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LMK04832PAP/EM Datasheet(PDF) 24 Page - Texas Instruments |
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LMK04832PAP/EM Datasheet(HTML) 24 Page - Texas Instruments |
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24 / 103 page ![]() 8.3 Feature Description 8.3.1 Synchronizing PLL R Dividers In some cases, it is necessary to synchronize PLL R dividers to enable determinism of clocks outputs to inputs. This typically is required when the fraction Total PLL N divide / Total PLL R divide does not reduce to N / 1. 8.3.1.1 PLL1 R Divider Synchronization It is possible to use the CLKIN0 or SYNC pin to synchronize the PLL1 R divider. In either case, the PLL1 R divider is armed for reset, then the rising sync edge arrives from either the SYNC pin or CLKIN0. After the PLL1 R divider is armed, PLL1 is unlocked until the synchronization edge arrives and allows the divider to operate and the PLL to lock. The procedure to synchronize PLL1 R is as follows: 1. Setup device for synchronizing PLL1 R: • PLL1R_SYNC_EN = 0x1 • PLL1R_SYNC_SRC = 0x1 (SYNC pin) or 0x2 (CLKIN0) • CLKin0_DEMUX = 0x2 (PLL1) • CLKin1_DEMUX = 0x2 (PLL1) • CLKin0_TYPE = 0x1 (MOS) for DC-coupled or CLKin0_TYPE = 0x0 (Bipolar) for AC-coupled 2. Arm PLL1 R divider for synchronization • PLL1R_RST = 1, then 0. • PLL1 is unlocked. 3. Send rising edge on SYNC pin or CLKIN0. • PLL1 R divider is released from reset and PLL1 relocks. It is necessary to meet a setup and hold time when CLKIN0 or SYNC pin goes high to ensure deterministic reset of the PLL1 R divider. The SYNC_POL bit has no effect on SYNC polarity for PLL1 R synchronization. 8.3.1.2 PLL2 R Divider Synchronization The SYNC pin must be used to synchronized the PLL2 R divider. When PLL2R_SYNC_EN = 1, as long as the SYNC pin is held high, the PLL2 R divider is held in reset. When the SYNC pin is returned low, the divider is allowed to continue dividing. While PLL2R_SYNC_EN = 1 and SYNC pin is high PLL2 is unlocked. It is necessary to meet a setup and hold time when SYNC pin goes low to ensure deterministic reset of the PLL2 R divider. The SYNC_POL bit has no effect on SYNC polarity for PLL2 R synchronization. LMK04832-SEP SNAS838 – OCTOBER 2022 www.ti.com 24 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: LMK04832-SEP |
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