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LMK04832PAP/EM Datasheet(PDF) 46 Page - Texas Instruments

Part # LMK04832PAP/EM
Description  LMK04832-SEP Space Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner
PDF  103 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LMK04832PAP/EM Datasheet(HTML) 46 Page - Texas Instruments

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8.6.2.2.3 CLKoutX_Y_PD, CLKoutX_Y_ODL, CLKoutX_Y_IDL, DCLKX_Y_DDLY_PD, DCLKX_Y_DDLY[9:8],
DCLKX_Y_DIV[9:8]
Table 8-21. Registers 0x102, 0x10A, 0x112, 0x11A, 0x122, 0x12A, 0x132
BIT
NAME
POR DEFAULT
DESCRIPTION
7
CLKoutX_Y_PD
1
Power down the clock group defined by X and Y.
0: Enabled
1: Power down entire clock group including both CLKoutX and CLKoutY.
6
CLKoutX_Y_ODL
0
Sets output drive level for clocks. This has no impact for the even clock output
in bypass mode.
0: Normal operation
1: Higher current consumption and lower noise floor.
5
CLKoutX_Y_IDL
0
Sets input drive level for clocks.
0: Normal operation
1: Higher current consumption and lower noise floor.
4
DCLKX_Y_DDLY_PD
0
Powerdown the device clock digital delay circuitry.
0: Enabled
1: Power down static digital delay for device clock divider.
3:2
DCLKX_Y_DDLY[9:8]
0
MSB of static digital delay, see DCLKX_Y_DDLY.
1:0
DCLKX_Y_DIV[9:8]
0
MSB of device clock divide value, see Table 8-16.
LMK04832-SEP
SNAS838 – OCTOBER 2022
www.ti.com
46
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Product Folder Links: LMK04832-SEP



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