LMK04832PAPSLASHEM datasheet(51/103 Pages) TI

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Table 8-27. Registers 0x10F (CLKout2_3), 0x117 (CLKout4_5), 0x127 (CLKout8_9), 0x137 (CLKout12_13)

BIT

NAME

POR DEFAULT

DESCRIPTION

7:4

CLKoutY_FMT

Set CLKoutY clock format

Field Value

Output Format

0 (0x00)

Powerdown

1 (0x01)

LVDS

2 (0x02)

HSDS 6 mA

3 (0x03)

HSDS 8 mA

4 (0x04)

LVPECL 1600 mV

5 (0x05)

LVPECL 2000 mV

6 (0x06)

LCPECL

7 (0x07)

CML 16 mA

8 (0x08)

CML 24 mA

9 (0x09)

CML 32 mA

10 (0x0A)

CMOS (Off/Norm)

11 (0x0B)

CMOS (Inv/Off)

12 (0x0C)

CMOS (Norm/Norm)

13 (0x0D)

CMOS (Norm/Inv)

14 (0x0E)

CMOS (Inv/Norm)

15 (0x0F)

CMOS (Inv/Inv)

3:0

CLKoutX_FMT

Set CLKoutX clock format

Field Value

Output Format

DCLKX_BYP = 0

Output Format

DCLKX_BYP = 1

0 (0x00)

Powerdown

Reserved

1 (0x01)

LVDS

Reserved

2 (0x02)

HSDS 6 mA

Reserved

3 (0x03)

HSDS 8 mA

Reserved

4 (0x04)

LVPECL 1600 mV

Reserved

5 (0x05)

LVPECL 2000 mV

Reserved

6 (0x06)

LCPECL

Reserved

7 (0x07)

Reserved

CML 16 mA

8 (0x08)

Reserved

CML 24 mA

9 (0x09)

Reserved

CML 32 mA

10 (0x0A)

CMOS (Off/Norm)(1)

Reserved

11 (0x0B)

CMOS (Inv/Off)(1)

Reserved

12 (0x0C)

CMOS (Norm/Norm)(1)

Reserved

13 (0x0D)

CMOS (Norm/Inv)(1)

Reserved

14 (0x0E)

CMOS (Inv/Norm)(1)

Reserved

15 (0x0F)

CMOS (Inv/Inv)(1)

Reserved

(1)

Only valid for CLKout8.

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LMK04832-SEP

SNAS838 – OCTOBER 2022

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