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LMK04832PAP/EM Datasheet(PDF) 66 Page - Texas Instruments |
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LMK04832PAP/EM Datasheet(HTML) 66 Page - Texas Instruments |
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66 / 103 page ![]() 8.6.2.6.2 MAN_DAC These registers set the value of the DAC in holdover mode when used manually. Table 8-48. MAN_DAC[9:0] MSB LSB 0x14B[1:0] 0x14C[7:0] REGISTER BIT NAME POR DEFAULT DESCRIPTION 0x14B 7:2 See LOS_TIMEOUT, LOS_EN, TRACK_EN, HOLDOVER_FORCE, MAN_DAC_EN, MAN_DAC[9:8] for information on these bits. 0x14B 1:0 MAN_DAC[9:8] 2 Sets the value of the manual DAC when in manual DAC mode. Field Value DAC Value 0 (0x00) 0 1 (0x01) 1 0x14C 7:0 MAN_DAC[7:0] 0 2 (0x02) 2 ... ... 1022 (0x3FE) 1022 1023 (0x3FF) 1023 8.6.2.6.3 DAC_TRIP_LOW This register contains the high value at which holdover mode is entered. Table 8-49. Register 0x14D BIT NAME POR DEFAULT DESCRIPTION 7:6 NA 0 Reserved 5:0 DAC_TRIP_LOW 0 Voltage from GND at which holdover is entered if HOLDOVER_VTUNE_DET is enabled. Field Value DAC Trip Value 0 (0x00) 1 x Vcc / 64 1 (0x01) 2 x Vcc / 64 2 (0x02) 3 x Vcc / 64 3 (0x03) 4 x Vcc / 64 ... ... 61 (0x17) 62 x Vcc / 64 62 (0x18) 63 x Vcc / 64 63 (0x19) 64 x Vcc / 64 LMK04832-SEP SNAS838 – OCTOBER 2022 www.ti.com 66 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: LMK04832-SEP |
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