LMK04832PAPSLASHEM datasheet(61/103 Pages) TI

61 / 103 page

8.6.2.4 (0x146 - 0x149) CLKIN Control

8.6.2.4.1 CLKin_SEL_PIN_EN, CLKin_SEL_PIN_POL, CLKin2_EN, CLKin1_EN, CLKin0_EN, CLKin2_TYPE,

CLKin1_TYPE, CLKin0_TYPE

This register has CLKin enable and type controls. See Input Clock Switching for more info on how clock input

selection works.

Table 8-42. Register 0x146

BIT

NAME

POR DEFAULT

DESCRIPTION

CLKin_SEL_PIN_EN

Enables pin control according to Input Clock Switching.

CLKin_SEL_PIN_POL

Inverts the CLKin polarity for use in pin select mode.

0: Active High

1: Active Low

CLKin2_EN

Enable CLKin2 to be used during auto-switching.

0: Not enabled for auto mode

1: Enabled for auto clock switching mode

CLKin1_EN

Enable CLKin1 to be used during auto-switching.

0: Not enabled for auto mode

1: Enabled for auto clock switching mode

CLKin0_EN

Enable CLKin0 to be used during auto-switching.

0: Not enabled for auto mode

1: Enabled for auto clock switching mode

CLKin2_TYPE

0: Bipolar

1: MOS

There are two buffer types for CLKin0,

1, and 2: bipolar and CMOS. Bipolar

is recommended for differential inputs

like LVDS or LVPECL. CMOS is

recommended for DC-coupled single

ended inputs.

When using bipolar, CLKinX and

CLKinX* must be AC-coupled.

When using CMOS, CLKinX and

CLKinX* may be AC or DC-coupled

if the input signal is differential. If

the input signal is single-ended the

used input may be either AC or DC-

coupled and the unused input must

AC grounded.

CLKin1_TYPE

CLKin0_TYPE

8.6.2.4.2 CLKin_SEL_AUTO_REVERT_EN, CLKin_SEL_AUTO_EN, CLKin_SEL_MANUAL, CLKin1_DEMUX,

CLKin0_DEMUX

Table 8-43. Register 0x147

BIT

NAME

POR DEFAULT

DESCRIPTION

CLKin_SEL_

AUTO_REVERT_EN

If the active clock is detected on a higher priority clock while the device is in

auto clock switching mode, the clock input is immediately switched. Highest

priority input is lowest numbered active clock input.

CLKin_SEL_AUTO_EN

Enables pin control according to Figure 8-7.

5:4

CLKin_SEL_MANUAL

Selects the clock input when in manual mode according to Figure 8-7.

Field Value

Definition

0 (0x00)

CLKIN0

1 (0x01)

CLKIN1

2 (0x02)

CLKIN2

3 (0x03)

Holdover

www.ti.com

LMK04832-SEP

SNAS838 – OCTOBER 2022

Submit Document Feedback

Product Folder Links: LMK04832-SEP

LMK04832PAP/EM Datasheet(PDF) 61 Page - Texas Instruments

LMK04832PAP/EM Datasheet(HTML) 61 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL