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IP175DLF Datasheet(PDF) 19 Page - List of Unclassifed Manufacturers

Part # IP175DLF
Description  5 Port 10/100 Ethernet Integrated Switch (Loop Detection, Layer 2-4 MF Classifier, HW IGMP Snooping)
PDF  145 Pages
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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IP175DLF Datasheet(HTML) 19 Page - List of Unclassifed Manufacturers

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IP175DLF
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August 22, 2014
Copyright © 2007, IC Plus Corp.
IP175DLF-DS-R10.1
Pin description (continued)
Pin No.
Label
Type
Description
External MII port setting
75
P4MII_SNI
IPL
SNI enable for MII0
1: SNI interface
0: MII interface (default).
It is valid only is P4EXT is pulled high and RMII_EN is
pulled low.
It is valid for MII0 only.
51
MII1_DIS
IPL
Disable MII1
1: MII1 is disabled. It is for router application with
one-MAC CPU.
0:.MII1 is enabled. PHY4 is an independent PHY and
can be access through MII1. It is for router application
with two-MAC CPU (default).
It is valid only if P4EXT is pulled high.
Configuration summary
mode
p4ext
mii1
_dis
mii1_phy
_mod
mii2_e
n
p4mii_
sni
rmii_
en
mii0_mac_
mod
mii2_mac_
mod
tb_mii0_
en
MII/RMII0
TBMII/PHY mode
1
X
X
X
0
0
0
X
1
TBMII/MAC mode
1
X
X
X
0
0
1
X
1
MII/ PHY mode
1
X
X
X
0
0
0
X
0
MII/ MAC mode
1
X
X
X
0
0
1
X
0
RMII
1
X
X
X
0
1
X
X
0
SNI/ PHY mode
1
X
X
X
1
0
0
X
0
SNI/ MAC mode
1
X
X
X
1
0
1
X
0
MII/RMII1
MII/ PHY mode
1
0
1
X
X
0
X
X
0
MII/ MAC mode
1
0
0
0
X
0
X
X
0
RMII/PHY mode
1
0
1
X
X
1
X
X
0
RMII/MAC mode
1
0
0
0
X
1
X
X
0
MII/RMII2
MII/ PHY mode
1
0
1
1
X
0
X
0
0
MII/ MAC mode
1
0
1
1
X
0
X
1
0
RMII
1
0
1
1
X
1
X
X
0
Note:
1. RMII_EN takes precedence of P4MII_SNI.
2. In MAC mode application, MII_CLK must be provided before end of chip reset, otherwise must follow
up a software-reset after MII_CLK be provided.
3. In RMII mode application, RMII_CLK must be provided before end of chip reset, otherwise must follow
up a software-reset after RMII_CLK be provided.



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