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IP175DLF Datasheet(PDF) 74 Page - List of Unclassifed Manufacturers

Part # IP175DLF
Description  5 Port 10/100 Ethernet Integrated Switch (Loop Detection, Layer 2-4 MF Classifier, HW IGMP Snooping)
PDF  145 Pages
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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IP175DLF Datasheet(HTML) 74 Page - List of Unclassifed Manufacturers

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IP175DLF
Datasheet
5
Switch Register
The IP175DLF can be configured via external EEPROM interface at boot time. During operation,
IP175DLF registers are accessible via MDC0/MDIO0 interface.
5.1
Switch Register Map
External MII Configuration
Rate Control
REG NUM
0
1
2
3
4
5
6
7
8
9
10
11
Description
12
13
14
15
16
17
18
19
20
21
22
23
IGMP Control Register
24
25
26
27
28
29
30
31
Reserved
Address Table Access Register
Loop Detection Register
Miscellaneous Control Register
REG NUM
0
1
2
3
4
5
6
7
8
9
10
11
Description
System Reset
Force Mode
Illegal Frame Filter
Congestion Control
Port State
Packet Identification
12
13
14
15
16
17
18
19
20
21
22
23
Broadcast Storm Protection
Learning Control Register
Network Security
Ageing Time Parameter
Port Mirror
Source Block Protection
24
25
26
27
28
29
30
31
LED Control Register
Reserved
CRC Counter
Rate Control
Reserved
Reserved
Reserved
Reserved
Reserved
Chip identification
74/145
August 22, 2014
Copyright © 2007, IC Plus Corp.
IP175DLF-DS-R10.1



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