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IP175DLF Datasheet(PDF) 24 Page - List of Unclassifed Manufacturers

Part # IP175DLF
Description  5 Port 10/100 Ethernet Integrated Switch (Loop Detection, Layer 2-4 MF Classifier, HW IGMP Snooping)
PDF  145 Pages
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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IP175DLF Datasheet(HTML) 24 Page - List of Unclassifed Manufacturers

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IP175DLF
Datasheet
24/145
August 22, 2014
Copyright © 2007, IC Plus Corp.
IP175DLF-DS-R10.1
Pin description (continued)
Pin No.
Label
Type
Description
External MII2 interface (PHY mode, MII2_MAC_MOD=0, MII2_EN=1)
109
MII2_RXCLK
O
MII receive clock
103
MII2_TXCLK
O
MII transmit clock
102, 101,
100, 97
TXD2_0, TXD2_1,
TXD2_2, TXD2_3
I
MII transmit data
It is sampled at the rising edge of MII2_TXCLK.
96
TXEN2
I
MII transmit enable
It is used to frame TXD0[3:0]. It is sampled at the rising edge of
MII2_TXCLK.
110
COL2
O
MII collision
It is active when MII2 is half duplex and a collision event happens.
104
RXDV2
O
MII receive data valid
It is used to frame RXD0[3:0]. It is sent out at the falling edge of
MII2_RXCLK.
108, 107,
106, 105
RXD2_0, RXD2_1,
RXD2_2, RXD2_3
O
MII receive data
It is sent out at the falling edge of MII2_RXCLK.



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