IP175DLF datasheet(84/145 Pages) ETC

Part #	IP175DLF

Description	5 Port 10/100 Ethernet Integrated Switch (Loop Detection, Layer 2-4 MF Classifier, HW IGMP Snooping)

PDF	145 Pages

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Manufacturer	ETC [List of Unclassifed Manufacturers]

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84 / 145 page

IP175DLF

Datasheet

84/145

August 22, 2014

IP175DLF-DS-R10.1

PHY

MII

ROM

R/W

Description

Default

TRAP_LLDP[1:0]

Link Layer Discovery Protocol

Reserved MAC address is 01:80:C2:00:00:0E

LLDP Data Units (LLDPDUs) encoded with an Ethertype

value of 0x88CC.

00: forward (default)

01: forward to CPU

10: discard

11: reserved

Default Value

P4EXT=1

P4EXT=0

8[9:8]

7[1:0]

R/W

2’b00

Pin_069(2’b00)

0: 2’b00

1: 2’b10

TRAP_802P1X[1:0]

IEEE 802.1X Port-Based Network Access Control

Reserved MAC address is 01:80:C2:00:00:03

00: forward (default)

01: forward to CPU

10: discard

11: reserved

Default Value

P4EXT=1

P4EXT=0

8[7:6]

R/W

2’b00

Pin_069(2’b00)

0: 2’b00

1: 2’b10

TRAP_SP[1:0]

IEEE 802 standard protocol – Slow Protocols

Reserved MAC address is 01:80:C2:00:00:02

00: forward (default)

01: forward to CPU

10: discard

11: reserved

Default Value

P4EXT=1

P4EXT=0

8[5:4]

R/W

2’b00

Pin_069(2’b00)

0: 2’b00

1: 2’b10

8[3]

RESERVED

8[2]

R/W TRAP_PAUSE

Point-to-Point Pause function

Reserved MAC address is 01:80:C2:00:00:01

1: forward

0: discard (default)

1’b0

IP175DLF Datasheet(PDF) 84 Page - List of Unclassifed Manufacturers

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