IP175DLF datasheet(83/145 Pages) ETC

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IP175DLF

Datasheet

83/145

August 22, 2014

IP175DLF-DS-R10.1

PHY

MII

ROM

R/W

Description

Default

7[2]

6[2]

R/W MC_SMC

Filter Frame with multicast source MAC address

1’b0

7[1]

6[1]

R/W NULL_MAC

Filter Frame with null source or destination MAC address

1’b0

7[0]

6[0]

R/W CRC_ERROR

Filter CRC Frame

1’b1

5.3.7

Special Packet Identification

5.3.7.1

Reserved Address 01-80-C2-00-00-00 to 01-80-C2-00-00-1F

PHY

MII

ROM

R/W

Description

Default

8[15:14]

7[7:6]

R/W TRAP_RSVD_ADDR1[1:0]

Reserved address range 1

Reserved MAC address is from

01:80:C2:00:00:11 to 01:80:C2:00:00:1F

00: forward (default)

01: forward to CPU

10: discard

11: reserved

2’b00

8[13:12]

7[5:4]

R/W TRAP_ABM[1:0]

All Bridges Multicast address defined by IEEE 802.1D

Reserved MAC address is 01:80:C2:00:00:10

00: forward (default)

01: forward to CPU

10: discard

11: reserved

2’b00

TRAP_RSVD_ADDR0[1:0]

Reserved address range 0

Reserved MAC address is from

01:80:C2:00:00:04 to 01:80:C2:00:00:0D, 01:80:C2:00:00:0F

00: forward (default)

01: forward to CPU

10: discard

11: reserved

Default Value

P4EXT=1

P4EXT=0

8[11:10]

7[3:2]

R/W

2’b00

Pin_069(2’b00)

0: 2’b00

1: 2’b10

IP175DLF Datasheet(PDF) 83 Page - List of Unclassifed Manufacturers

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