IP175DLF datasheet(55/145 Pages) ETC

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IP175DLF

Datasheet

55/145

August 22, 2014

IP175DLF-DS-R10.1

Other: Reserved

Special Tag for TX (From CPU to switch)

Frame direction is from CPU to switch. This function provides for forwarding decision, priority assign and

learning disable. These parameter embedded in special tag header can be set by CPU.

If the CPU transmits packet without Special Tag, the packet will be forwarded according to the mac

address table.

Special Tagged Information

Description

Bit 7

0: Learn Enable

1: Learn Disable

Bit 6-5

Priority Assignment

2’b00: Disabled

2’b01: Queue 1

2’b10: Queue 2

2’b11: Queue 3

Bit 4-0

Output Port Mask

bit 4: port 4

bit 3: port 3

bit 2: port 2

bit 1: port 1

bit 0: port 0

3.16

Loop Detection

A loop detection apparatus and method for IP175D having a loop detection module is configured to detect

a particular port receiving a loop frame indicative of a loop condition occurrence at the port. IP175D

support auto blocking/recover rx/tx traffic of mii0 and loop port.

This function can be enabled by programming the corresponding bit in MII registers 21.20~20.21 and

27.9~27.11.

In detail, please refer to the loop detection application note.

3.17

Serial Mode LED

When MII/RMII2 is enabled, there are no enough pins for LED and IP175DLF sends out LED information

through pin 111 (SCLK) and pin112 (SDATA). It is necessary to use TTL chip to decode and drive LED.

The application circuit is shown below.

IP175DLF supports two types of serial led mode and can be setting by pin112 or MII register 20.24[2]. The

default value is 0 (SERIAL_LED_MODE = 0) and can be setting to 1 by pull up pin112 (4.7K) or writing 1

to MII register 20.24[2].

(SERIAL_LED_MODE=0, IP175DLF supports link, speed, and duplex LED)

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