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IP175DLF Datasheet(PDF) 90 Page - List of Unclassifed Manufacturers

Part # IP175DLF
Description  5 Port 10/100 Ethernet Integrated Switch (Loop Detection, Layer 2-4 MF Classifier, HW IGMP Snooping)
PDF  145 Pages
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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IP175DLF Datasheet(HTML) 90 Page - List of Unclassifed Manufacturers

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IP175DLF
Datasheet
90/145
August 22, 2014
Copyright © 2007, IC Plus Corp.
IP175DLF-DS-R10.1
PHY
MII
ROM
R/W
Description
Default
13[4]
16[4]
R/W RESERVED
13[3]
16[3]
R/W AT_STR
Address Table Structure
0: 2K Address Table for unicast frame (default)
1: 1K Address Table for unicast frame and 1K Address Table
for multicast frame
Note – We recommend clear address table once this bit is
modified.
pin_42
(0)
13[2]
RESERVED
13[1]
16[1]
R/W IGMP_OVER_VLAN
0 : Disable
1 : Enable
It is valid only for LEARN_CONSTRAIN is enabled
pin_42
(0)
13[0]
16[0]
R/W LEARN_CONSTRAIN
Learning Constraint
0 : VLAN information(FID) is not used to create a hash key
1 : VLAN information(FID) is used to create a hash key
Note – We recommend clear address table once this bit is
modified.
1’b0



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