DA6021 datasheet(146/225 Pages) RENESAS

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DA6021

HIGHLY INTEGRATED POWER MANAGEMENT IC FOR

INTEL® ATOM™ Z3000 PROCESSOR

Company Confidential

Data Sheet

Version 3.A - Final

31-Jan-14

146 of 224

www.dialog-semiconductor.com

Result register

15.3.4

Each channel has an individual 10 bit result register. Each result of an automatic, internal or manual

measurement will simply be stored into the according result register after end of conversion no matter where the

measurement is initiated from. So always the newest value is represented in the result register. All result

registers are split to two register addresses with 2 bit MSB and 8 bit LSB.

In case a LBUS read access appears on one of the 2 result register addresses of a channel, MSBs and LSBs of

result register of that channel will be locked for internal accesses from the ADC. So no result will be written to

these registers in this case. The sequencer will not be interrupted. All other ADC results of that channel will be

lost if a register is locked and a result is due to be stored. Since the result of a manual measurement cannot be

stored in case the result register of this channel is locked, no interrupt will be generated and the manual request

If another LBUS read access is detected on this or another register, the result register will be unlocked again. All

locks will be cleared when entering SOC_G3.

CH0: Battery Pack Voltage

15.3.5

The Battery Pack Voltage measurement requires the preamplifier to be turned on with a gain of 0.5.

Battery Pack Voltages is internally measured every 4s in all active and standby states S4-S0.

CH1: Battery ID resistance

15.3.6

The Battery ID resistance measurement requires the Voltage Reference VREFB to be turned on at least 1ms

before a measurement is initiated. Instead of the Voltage Reference a Current Source ISRCB can be used. This

is selected by bit CALIB.ISRC_ENA

CH2: Die Temperature

15.3.7

The DA6021 die temperature thermistor has an alert event register EPMICALRT that flag an interrupt when the

according temperature threshold PMICALRT is exceeded. In case temperature exceeds one of the thresholds,

the status register SPMICALRT and the event register EPMICALRT are set and an Interrupt is generated to the

SOC. A hysteresis is implemented for this event, so the status is cleared and another event is generated when

the temperature falls below the PMICALRT + PMICHYS threshold.

Note, high temperature means low ADC result values.

CH3-4: Battery Pack Temperature

15.3.8

A critical event is implemented with an upper and a lower threshold defined in THRMBATCRIT registers. In case

temperature exceeds one of the thresholds, the charger is turned off, the status register SBATCTRITALRT and

the event register EBATCTRITALRT are set and an Interrupt is generated to the SOC. The status register is

cleared when the over-temperature condition is not given any longer. Since there is no hysteresis register for this

measurement threshold, three consecutive measurements need to be in the normal range to clear the

over/under temp status.

Charging is only allowed between the HOT and COLD thresholds.

Each of the battery temperature thermistors BAT0 and BAT1 has its own alert event register EBATxALRT that

flag an interrupt when the according temperature threshold BATxALRT-missing in Intel requirement spec is

exceeded. In case temperature exceeds one of the thresholds, the status register SBATxALRT and the event

event, so the status is cleared and another event is generated when the temperature falls below the BATxALRT

+ BATxHYS threshold.

Note, high temperature means low ADC result values.

DA6021 Datasheet(PDF) 146 Page - Renesas Technology Corp

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