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DA6021 Datasheet(PDF) 142 Page - Renesas Technology Corp

Part # DA6021
Description  HIGHLY INTEGRATED POWER MANAGEMENT IC FOR INTEL® ATOM™ Z3000 PROCESSOR
PDF  225 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

DA6021 Datasheet(HTML) 142 Page - Renesas Technology Corp

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DA6021
HIGHLY INTEGRATED POWER MANAGEMENT IC FOR
INTEL® ATOM™ Z3000 PROCESSOR
Company Confidential
Data Sheet
Version 3.A - Final
31-Jan-14
© 2014 Dialog Semiconductor GmbH
142 of 224
www.dialog-semiconductor.com
Ch
Input
Data Format
0
VBAT
1
BATID
2
TPMIC
inverted
3
TBAT0
Inverted
4
TBAT1
Inverted
5
TSYS0
Inverted
6
TSYS1
Inverted
7
TSYS2
Inverted
8
IVCC
9
IVNN
10
IV1P0A
11
IV1P05S
12
IVDDQ
13
VSYS
Table 101: ADC Channel Data Format
ADC Sequencer
15.3
The operation of all ADC functionality is controlled by an independent standalone ultra-flexible ADC sequencer.
The sequence has 16 slots and each slot a duration of min tslot = ~64 µs. Each slot contains two steps. First a
single automatic measure initiated by the SOC and configured by register settings is performed, second a single
(if min tslot = ~64 µs) or multiple (min tslot > 64 µs) internal measure for on-chip functions and decisions might be
performed. Whenever there is no automatic or internal measurement, manual measure initiated by the SOC can
be performed. If no measurement is performed, the ADC is turning off to reduce power consumption.
The sequencing is configured in such a way that it fulfills the Intel ADC specification and performs automatically
measurement at the appropriate time (platform state defendant)
Manual Measurements
15.3.1
An automatic measurement can be assigned to a specific slot while a manual measurement can’t. Manual
measurements will be performed at free slots or whenever there is space in the internal measure frame. Free
slots are unassigned slots, slot with down sampling while not measuring and masked or disabled slots in standby
mode. To initiate a manual measurement two separate registers MANCONV0 and MANCONV1 exists, one bit
for each ADC Channel. One or more channels can be selected in one register write.
Register Name
MANCONV0
Address
0x72
Page 1
Read/Write
Reset Value
0x00
MSB
LSB
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
SYS
THERM2
SYS
THERM1
SYS
THERM0
BP
THERM1
BP
THERM0
PMIC
TEMP
BATID
VBAT
VBAT
0
1
Initiates manual conversion of VBAT, clears after conversion
BATID
0
1
Initiates manual conversion of BATID, clears after conversion
PMICTEMP
0
1
Initiates manual conversion of PMICTEMP, clears after conversion
BPTHERM0
0
1
Initiates manual conversion of BPTHERM0, clears after conversion
BPTHERM1
0
1
Initiates manual conversion of BPTHERM1, clears after conversion



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