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DA6021 Datasheet(PDF) 139 Page - Renesas Technology Corp

Part # DA6021
Description  HIGHLY INTEGRATED POWER MANAGEMENT IC FOR INTEL® ATOM™ Z3000 PROCESSOR
PDF  225 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

DA6021 Datasheet(HTML) 139 Page - Renesas Technology Corp

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DA6021
HIGHLY INTEGRATED POWER MANAGEMENT IC FOR
INTEL® ATOM™ Z3000 PROCESSOR
Company Confidential
Data Sheet
Version 3.A - Final
31-Jan-14
© 2014 Dialog Semiconductor GmbH
139 of 224
www.dialog-semiconductor.com
15. Analog
–to–Digital Converter
A general purpose analog-to-digital converter (GPADC) provides measurements of various voltages, currents
and temperatures within the device. There is one 10-bit ADC which is time-division multiplexed to perform the
measurements of the various parameters. The GPADC contains the 10-bit ADC, the analog input channel
multiplexer and some additional analog functions.
The digital ADC block automates the measurement process by overlaying a sequencer function. It performs
some automatic measurements at predefined sequence points, if enabled. Besides that, the host can initiate
manual measurements at certain points in the sequence. The ADC replaces some on-chip comparator used for
internal purpose so in addition to the automatic measures initiated by the host, internal measure sequences are
processed, too.
The automatic measurements can raise interrupts if the measurement is outside of configurable thresholds.
The digital block controls the analog-to-digital (AD) conversion process. This allows testing the conversion logic
via scan tests.
When powering down the device the digital ADC block may stop the measurements and disable the GPADC in
order to reduce the power consumption. This feature is controlled by the Power Supply Sequencer (PSS) and
some registers.
Electrical Characteristics
15.1
PARAMETER
SYMBOL
TEST CONDITIONS
Min
Typ
Max
UNIT
Val
ADC Resolution
10
bit
D,E
Absolute Accuracy
12
15
mV
A
Integral Non-Linearity
INL
+/- 2
LSB
A
Differential Non-
Linearity
DNL
+/- 0.8
LSB
A
ADC Supply Voltage
2.5
V
-
ADC Reference
Voltage
VADC_R
EF
VDD_CORE
2.5
V
-
ADC Operating
Current
during conversion
100
µA
D
Power Down Current
1
µA
D
ADC Clock
1
MHz
D
Auto-Zero Time
3
us
D
Total Sampling Time
including the Auto-
Zero time
10
us
D
Conversion Time
11
us
D
Total ADC Conversion
Time
21
us
D
Maximum Source
Impedance
RS
RS is the impedance
of the external
source sampled by
the ADC
120
kΩ
D
Internal Mux
Resistance
RINT
5
kΩ
D
Internal Sampling
Capacitor
CS
10
pF
D
Total Input
Capacitance
CINT
parasitic and pad
capacitance included
11
pF
D
Acquisition Time
~7τ = 7 x (RS +
RINT) x CINT
10
us
D
VSYS Voltage Range
/ channel A0 /
ADC=[(VSYS-2.5) x
0.5] x 1023
2.5
5.5
V
A



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