DA6021 datasheet(188/225 Pages) RENESAS

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DA6021

HIGHLY INTEGRATED POWER MANAGEMENT IC FOR

INTEL® ATOM™ Z3000 PROCESSOR

Company Confidential

Data Sheet

Version 3.A - Final

31-Jan-14

188 of 224

www.dialog-semiconductor.com

18. External Battery Charger Control

Overview

18.1

In order to determine the appropriate input current limit for the charger during certain scenarios, the CHGDET_B

pin is asserted or de-asserted by the USB PHY on the platform depending on output current capability of the

USB charger detected.

ILIM0 and ILIM1 pins of DA6021 will output signals to the charger to set the charger input current limit. The

external charger is capable of interrupt which will be forwarded to the SoC via DA6021. This interrupt will come

from the CHGRINT_B pin. During charging the battery temperature will be monitored.

Charger Current Limit

18.2

The external charger input current limits are set according to the table below

CHRDET_B

ILIM1

ILIM0

Power source

Input current limit

USB DCP

More than 100mA, usually 1.5A

USB SDP

100mA

USB SDP

500mA

AC/DC adapter

Customer specific, limited by max

charger output current

Table 108: External Charger Current Limits

The AC/DC adapter usually takes priority over the USB charger as input power to the external battery charger.

However, DA6021 detects the AC/DC adapter by monitoring VDCIN_SENSE. DA6021 changes ILIM0 and ILIM1

level immediately VDCIN_SENSE fall below the internal voltage reference threshold to inform the external

charger to lower its current limit at the removal of AC/DC adapter.

External Charger Control Signals

18.3

DA6021 has the following I/O pins to interface with a discrete charger and USB PHY.

Name

Dir

Voltage

Signal Description

CHGRINT_B

VSYS

Battery charging status and fault interrupt from

charger IC, active low.

Internal 10kOhm pull-up to VSYS.

0=interrupt, asserted with a minimum pulse

width of 200µs

ILIM[1:0]

VSYS

External charger input current limits

CHGDET_B

VUSBPHY

USB DCP detection. Asserted by USBPHY

when it detected a charger that can source

more than 100mA

Internal 100kOhm pull-up to VSYS

1=SDP detected

0=DCP or CDP/ACA

Table 109: Charger Control Pins

The external battery charger interrupt is routed through DA6021 via CHGRINT_B pin. It alerts the SOC of an

interrupt by the CHGRIRQ register in which bit D0 is set at the falling edge of CHGRINT_B if not masked. The

interrupt mask registers allow external battery charger interrupt to be masked. There are two sets of interrupt

mask registers to offer the flexibility to selectively mask the interrupt in S0 state (MCHGRIRQS0) or in sleep

(S0IX, S3, S4) states (MPCHGRIRQSX)

DA6021 Datasheet(PDF) 188 Page - Renesas Technology Corp

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