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DA6021 Datasheet(PDF) 192 Page - Renesas Technology Corp |
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DA6021 Datasheet(HTML) 192 Page - Renesas Technology Corp |
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192 / 225 page ![]() DA6021 HIGHLY INTEGRATED POWER MANAGEMENT IC FOR INTEL® ATOM™ Z3000 PROCESSOR Company Confidential Data Sheet Version 3.A - Final 31-Jan-14 © 2014 Dialog Semiconductor GmbH 192 of 224 www.dialog-semiconductor.com Interrupt Name Register Source First-Level Interrupt Related Status Bit DESCRIPTION Unit occurs BAT0ALRT0 THRMIRQ2 Thermal Control Unit THRM Set by the thermal state machine when a battery thermistor 0 temperature alert0 occurs BAT1ALRT0 THRMIRQ2 Thermal Control Unit THRM Set by the thermal state machine when a battery thermistor 1 temperature alert0 occurs BAT0ALRT1 THRMIRQ2 Thermal Control Unit THRM Set by the thermal state machine when a battery thermistor 0 temperature alert1 occurs BAT1ALRT1 THRMIRQ2 Thermal Control Unit THRM Set by the thermal state machine when a battery thermistor 1 temperature alert1 occurs BAT0CRIT THRMIRQ2 Thermal Control Unit THRM Set by thermal state machine when a battery thermistor 0 critical temperature event occurs. BAT1CRIT THRMIRQ2 Thermal Control Unit THRM Set by thermal state machine when a battery thermistor 1 critical temperature event occurs. VWARNBIRQ BCUIRQ BCU BCU Triggers whenever the VSYS voltage crosses the VWARNB threshold, rising or falling. VWARNAIRQ BCUIRQ BCU BCU Triggers whenever the VSYS voltage crosses the VWARNA threshold, rising or falling. VCRITIRQ BCUIRQ BCU BCU Triggers whenever the VSYS voltage crosses the VCRIT threshold, rising or falling. VBAT ADCIRQ0 ADC ADC Bit is set after completion of VBAT manual conversion if not masked BATID ADCIRQ0 ADC ADC Bit is set after completion of BATID manual conversion if not masked PMICTEMP ADCIRQ0 ADC ADC Bit is set after completion of PMIC die temperature manual conversion if not masked BPTHERM0 ADCIRQ0 ADC ADC Bit is set after completion of BPTHERM0 manual conversion if not masked BPTHERM1 ADCIRQ0 ADC ADC Bit is set after completion of BPTHERM0 manual conversion if not masked SYSTHERM0 ADCIRQ0 ADC ADC Bit is set after completion of SYSTHERM0 manual conversion if not masked SYSTHERM1 ADCIRQ0 ADC ADC Bit is set after completion of SYSTHERM1 manual conversion if not masked SYSTHERM2 ADCIRQ0 ADC ADC Bit is set after completion of SYSTHERM2 manual conversion if not masked CHRG CHGRIRQ Charger Control Unit CHGR Triggered when an interrupt input from the external discrete charger is generated. GPIOxPx GPIOIRQ GPIO GPIO DINxPx Each GPIO pin can be configured as input with programmable interrupt edge |
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