TMS320F datasheet(194/389 Pages) TI

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LTD

Load TREG, Accumulate Previous Product, and Move Data

7-94

Syntax

LTD

dma

Direct addressing

LTD

ind [, ARn]

Indirect addressing

Operands

dma:

7 LSBs of the data-memory address

Value from 0 to 7 designating the next auxiliary register

ind:

Select one of the following seven options:

*–

*0+

*0–

*BR0+

*BR0–

LTD

dma

987

6543

210

dma

LTD

ind [, ARn]

987

6543

210

ARU

NAR

Note:

ARU, N, and NAR are defined in section 6.3,

Indirect Addressing Mode (page 6-9).

Execution

Increment PC, then ...

(data-memory address)

→ TREG

(data-memory address)

→ data-memory address + 1

(ACC) + shifted (PREG)

→ ACC

Status Bits

Affected by

Affects

PM and OVM

C and OV

Description

TREG is loaded with the contents of the specified data-memory address. The

contents of the PREG, shifted as defined by the PM status bits, are added to

the accumulator, and the result is placed in the accumulator. The contents of

the specified data-memory address are also copied to the next higher data-

memory address.

This instruction is valid for all blocks of on-chip RAM configured as data

memory. The data move function is continuous across the boundaries of con-

tiguous blocks of memory but cannot be used with external data memory or

memory-mapped registers. The data move function is described under the in-

struction DMOV.

Note:

If LTD is used with external data memory, its function is identical to that of

LTA; that is, the previous product will be accumulated, and the TREG will be

loaded from external data memory, but

the data move will not occur.

The carry bit is set (C = 1) if the result of the addition generates a carry and

is cleared (C = 0) if it does not generate a carry.

Opcode

TMS320F Datasheet(PDF) 194 Page - Texas Instruments

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