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TMS320F Datasheet(PDF) 225 Page - Texas Instruments

Part # TMS320F
Description  CPU and Instruction Set
PDF  389 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320F Datasheet(HTML) 225 Page - Texas Instruments

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Normalize Contents of Accumulator
NORM
7-125
Assembly Language Instructions
Syntax
NORM
ind
Indirect addressing
Operands
ind:
Select one of the following seven options:
*
*+
*–
*0+
*0–
*BR0+
*BR0–
NORM
ind
15
14
13
12
11
10
987
6543
210
1
0
1
0
0
0
0
0
1
ARU
N
NAR
Note:
ARU, N, and NAR are defined in section 6.3,
Indirect Addressing Mode (page 6-9).
Execution
Increment PC, then ...
If (ACC) = 0:
Then TC
→ 1;
Else, if (ACC(31)) XOR (ACC(30)) = 0:
Then TC
→ 0,
(ACC)
× 2 → ACC
Modify (current AR) as specified;
Else TC
→ 1.
Status Bits
Affects
TC
Description
The NORM instruction normalizes a signed number that is contained in the ac-
cumulator. Normalizing a fixed-point number separates it into a mantissa and
an exponent by finding the magnitude of the sign-extended number. An exclu-
sive-OR operation is performed on accumulator bits 31 and 30 to determine
if bit 30 is part of the magnitude or part of the sign extension. If they are the
same, they are both sign bits, and the accumulator is left shifted to eliminate
the extra sign bit.
The current AR is modified as specified to generate the magnitude of the expo-
nent. It is assumed that the current AR is initialized before normalization be-
gins. The default modification of the current AR is an increment.
Multiple executions of the NORM instruction may be required to completely
normalize a 32-bit number in the accumulator. Although using NORM with
RPT does not cause execution of NORM to fall out of the repeat loop automati-
cally when the normalization is complete, no operation is performed for the re-
mainder of the repeat loop. NORM functions on both positive and negative 2s-
complement numbers.
Opcode



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