AMD-762 datasheet(40/122 Pages) AMD

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Functional Operation

Chapter 2

AMD-762™ System Controller Data Sheet

24416C—December 2001

Preliminary Information

while the probe is in progress, then the AMD-762 system

controller disconnects the AMD Athlon processor system bus

following the completion of the probe. If the processors start

sending non-NOP AMD Athlon processor system bus cycles

while connected, then the AMD-762 system contro ller

transitions to the full-on state.

2.6.4

Power-On Suspend (S1)

The S1 state achieves very low power by disconnecting the

processors, entering self-refresh, and then gating off most of

the internal high-speed clock trees in the AMD-762 system

controller. Snooping is prevented by the device drivers prior to

entering this state. The DDR DRAM clocks continue to be

driven as required for the registered DDR DIMMs. Most

internal clocks are gated off, allowing the AMD-762 system

controller to achieve a low operating current.

The S1 state is entered in a similar manner to clock throttling,

starting with a STPCLK# assertion and the Stop Grant state. The

Southbridge asserts the DCSTOP# signal, which is used by the

AMD-762 system controller to gate off internal clock trees for

lower power. All power supplies remain on, and the clock

synthesizer chip on the motherboard continues to drive all clocks.

The sequence of operation for entering the S1 state is listed

below. Figure 10 on page 30 shows a power-on suspend system

timing diagram example.

S1 Sequence

1. The operating system communicates with all device drivers,

causing them to disable their respective peripherals, thus

preventing any new bus master activity (DMA) on the PCI

and AGP buses. DMA activity already in progress in the

AMD-762 system controller completes normally.

2. The Southbridge asserts STPCLK# to both AMD Athlon

processors.

3. The processors flush their buffers and generate a Stop

Grant special bus cycle on the AMD Athlon processor

system bus.

4. After receiving both Stop Grant special cycles, the

AMD-762 system controller flushes all internal queues and

initiates a disconnect cycle to the CPUs by deasserting their

CONNECT pins. The AMD Athlon processors respond by

deasserting the PROCRDY signal.

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