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AMD-762 Datasheet(PDF) 94 Page - Advanced Micro Devices

Part # AMD-762
Description  System Controller
PDF  122 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AMD-762 Datasheet(HTML) 94 Page - Advanced Micro Devices

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82
Signal Descriptions
Chapter 7
AMD-762™ System Controller Data Sheet
24416C—December 2001
Preliminary Information
Table 34.
Signal Descriptions
Signal
Type
Description
Processor Interface Signals
CLKFWDRST
O
AMD Athlon™ Processor System Bus Clock Forward Reset
CLKFWDRST resets the source-synchronous clock circuitry for the processor. Forwarded
clocks are driven continuously beginning three clocks after CLKFWDRST is negated.
This signal is negated by RESET#. It changes on the rising edge of SYSCLK.
CONNECT
O
AMD Athlon Processor System Bus Connect
CONNECT is an output from the AMD-762™ system controller and is used for power
management and source-synchronous clock initialization at reset.
This signal is negated by RESET#. It changes on the rising edge of SYSCLK.
PROCRDY
I
AMD Athlon Processor System Bus Connect Processor Ready
PROCRDY is an input to the AMD-762 system controller and is used for power
management and source-synchronous clock initialization at reset.
This signal is sampled on the rising edge of SYSCLK.
SADDIN[14:2]#
O
AMD Athlon Processor System Bus Connect Address/Command
SADDIN[14:2]# is a unidirectional system command bus to the processor. It is used to
transfer probe and data movement commands into the processor. SADDIN[14:2]# are
skew-aligned with the source-synchronous clock, SADDINCLK#. The AMD-762 system
controller drives the SADDIN[14:2]# channel on each edge of SADDINCLK#.
SADDINCLK#
O
AMD Athlon Processor System Bus Connect System Address In Clock
SADDINCLK# is the single-ended source-synchronous clock for the SADDIN[14:2]# bus,
driven by the AMD-762 system controller. Each clock edge is used to transfer probe and
data movement commands to the processor.
This signal is driven inactive (negated) when the CLKFWDRST signal is asserted (true).
When CLKFWDRST is negated, SADDINCLK# runs continuously after a three clock delay.
SADDOUT[14:2]#
I
AMD Athlon Processor System Bus Connect System Address Out
SADDOUT[14:2]# is a unidirectional system address interface from the processor to the
AMD-762 system controller. The SADDOUT[14:2]# channel is used to transfer processor
requests and probe responses to the system. This channel is skew-aligned with the
source-synchronous clock, SADDOUTCLK#. The SADDOUT[14:2]# channel is sampled by
the AMD-762 system controller on each edge of SADDOUTCLK#.
The AMD-762 system controller samples commands driven by the processor on the
SADDOUT[14:2]# channel and forwards them to the PCI bus, AGP bus, or DRAM,
depending on the address range and AMD-762 system controller configuration.
SADDOUTCLK#
I
AMD Athlon Processor System Bus Connect System Address Out Clock
SADDOUTCLK# is a single-ended source synchronous clock for the SADDOUT[14:2]#
channel driven by the processor. Each edge is used to transfer commands.
This signal is driven inactive (negated) when the CLKFWDRST signal is asserted (true). When
CLKFWDRST is negated, SADDOUTCLK# runs continuously after a three-clock delay.



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