AMD-762 datasheet(67/122 Pages) AMD

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Chapter 4

Electrical Data

24416C—December 2001

AMD-762™ System Controller Data Sheet

Preliminary Information

Figure 13.

AGPCLK and PCICLK Waveform

Table 17.

AGPCLK Switching Requirements for 66-MHz Bus Operation

Symbol

Parameter Description

Preliminary Data

Figure

Comments

Min

Max

1/t1

Frequency

66 MHz

AGPCLK High Time

6.0 ns

AGPCLK Low Time

6.0 ns

AGPCLK Fall Time

0.15 ns

2 ns

AGPCLK Rise Time

0.15 ns

2 ns

tSKEW

SYSCLK to AGPCLK Skew

–500 ps

500 ps

Rising to rising edges

AGPCLK Period Stability

± 300 ps

1.5-V reference

*This table contains preliminary information, which is subject to change.

Table 18.

PCICLK Switching Requirements for 33-MHz PCI Bus*

Symbol

Parameter Description

Preliminary Data

Figure

Comments

Min

Max

PCICLK Cycle

30 ns

∞

PCICLK High Time

11.0 ns

PCICLK Low Time

11.0 ns

PCICLK Fall Time

1 V/ns

2 V/ns

PCICLK Rise Time

1 V/ns

2 V/ns

PCICLK Period Stability

± 300 ps

1.5-V reference

*This table contains preliminary information, which is subject to change.

0.3 VDD_PCI

0.4 VDD_PCI

0.5 VDD_PCI

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