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GD3160 Datasheet(PDF) 69 Page - NXP Semiconductors

Part # GD3160
Description  Advanced IGBT/SiC gate driver
PDF  114 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

GD3160 Datasheet(HTML) 69 Page - NXP Semiconductors

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NXP Semiconductors
GD3160
Advanced IGBT/SiC gate driver
The GD3160 monitors the temperatures of the VDD regulator on the low-voltage domain, the GL transistor on
the high-voltage domain, and the GH transistor on the high-voltage domain. The GH sensing element is near
the VCCREG regulator, so it is protected, too. The VDD and GL circuits are used for overtemperature shutdown
only. Their temperatures cannot be read via the SPI or the AOUT pin. Temperature values are available only for
the GH temperature sensor on the high-voltage domain.
The output conversion values for AMUXIN and TSENSE are 000h to 3FFh (000h for 0 V; 3FF for VREF).
For VCC and VCCREG, the conversion values are 000h to 3FFh (000h for 0 V; 3FF for 30 V).
For VEE measurement through the AMUX, the conversion values are 000h (when VEE = –15 V) and 3FFh
(when VEE = 0 V). The voltage at the VEE pin (referred to as GND2, negative in most cases) is converted by
the ADC in Equation 3:
(3)
To perform a read of the ADC, set the bits AMUX_SEL [2:0] according to the signal to be read. Next perform
a read of the REQADC register. The result is then returned in the REQADC register. Note that the REQADC
register is read only.
11.13 24-bit serial peripheral interface
11.13.1 Introduction
The serial peripheral interface (SPI) has the following features:
• Full duplex, four-wire synchronous communication
• Responder mode operation only
• Fixed SCLK polarity and phase requirements
• Fixed 16-bit command word with 8-bit cyclic redundancy check (CRC)
• SCLK operation up to 10 MHz
• Compatible with daisy-chain operation
SPI communication follows Figure 35:
GD3160
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 13 — 6 May 2024
69 / 114



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