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GD3160 Datasheet(PDF) 8 Page - NXP Semiconductors |
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GD3160 Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 114 page ![]() NXP Semiconductors GD3160 Advanced IGBT/SiC gate driver Pin number Pin name Pin type Definition Comments 13 INTA Output/digital Interrupt/fault status/ monitor. Output pin reports fault via active pulldown interrupt, or reports VCE or VGE state via logic high/low. Pullup pin to VDD with a 50 kΩ resistor or left open if unused. 14 FSSTATE Input/digital Fail-safe gate state control pin. Gate output control pin. Connect to GND1 if unused. Internal passive pulldown to GND1. 15 FSENB Input/digital Fail-safe mode enable pin. Active-low pin enabling Fail-Safe mode (FSSTATE controls gate). Internal passive pulldown to GND1. Connect to VDD if unused. Pins 17 to 32 (high-voltage, isolated pins) 17, 32 GND2 Ground 2 Ground for isolated (HV) domain power, analog, and logic. Redundant GND2 pins provide ground reference for all isolated high-voltage (HV) domain. Isolated from all circuitry referenced to GND1. Connect to power device emitter/source. 18 CLAMP Input/analog Sense terminal for VCE/VDS overvoltage during turn-off. CLAMP detects Zener breakdown current and increase gate drive impedance and employ soft shutdown for turn-off. Connect to VEE if unused. 19 DESAT Input-output/ analog Drive/sense terminal for VCE/VDS desaturation condition. Connected to GND2 if unused. 20 ISENSE Input/analog Current sense feedback pin. Resistive network converts current mirror into readable voltage signal on ISENSE. Connect to GND2 if unused. 21, 23 VEE Input/power Negative gate supply voltage. VEE is the negative voltage on the isolated domain, and is referenced to GND2. Connect to GND2 if a negative supply is not used. 22 GL Output/analog Pulldown pin for output gate turn-off/discharge event. GL pin pulls gate to VEE. 24 AMC Input-output/ analog Direct connect to gate for gate voltage sense and active Miller clamp function. AMC provides low-impedance holdoff (active Miller clamp) and senses VGE/ VGS for reporting and diagnostics. 25 GH Output/analog Pullup pin for output gate turn-on event. GH pin pulls gate to VCCREG. 26 AMUXIN Input/analog General-purpose input for isolated ADC. One of many SPI-selectable inputs for the isolated ADC. Connect to GND2 if unused. 27 VCCREG Output/power Internally-regulated positive gate supply. Programmable gate supply derived from VCC, referenced to GND2. Connect to VCC if unused. 28 VCC Input/power Positive voltage supply for isolated domain circuitry. Referenced to GND2. 29 FSISO Input/digital HV domain pin to enable the Fail-safe state. Active-high disables PWM, FSSTATE, and, according to the part number, turns on gate (MGD3160AM515EK, MGD3160AM315EK, MGD3160 AM518EK or MGD3160AM318EK) or 3-states GATE (MGD3160AM535EK, MGD3160AM335EK, MGD3160AM538EK or MGD3160AM338EK). 30 TSENSEA Input/analog Anode of temp sense diode/NTC of the power module. TSENSEA reads back voltage from temperature sense element, and is referenced to GND2. Includes possible current driver for temp sense network. The temperature sense network cathode should be connected to GND2. Connect to VREF if unused. 31 VREF Output/power Internally regulated reference voltage for HV domain analog, ADC, and logic. Output for an internally generated 5.0 V, 20 mA regulator. Referenced to GND2. Table 2. Pin definitions...continued GD3160 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 13 — 6 May 2024 8 / 114 |
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