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GD3160 Datasheet(PDF) 89 Page - NXP Semiconductors |
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GD3160 Datasheet(HTML) 89 Page - NXP Semiconductors |
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89 / 114 page ![]() NXP Semiconductors GD3160 Advanced IGBT/SiC gate driver Bit value [1:0] ITSNS[1:0] TOFST[1:0] AMUXINOS[1] AOUT_SEL[1:0] 0x00 0.25 mA 0.0 V[1] 0.0 V[1] VCCREG 0x01 0.50 mA 0.5 V 0.5 V AMUXIN 0x02 0.75 mA 1.0 V 1.0 V VCC 0x03 1.00 mA[1] 1.5 V 1.5 V VEE Table 61. CONFIGAOUT parametric ranges [1] Default value 11.14.20 ADC request and response (ADDR = 0x13) The REQADC command will convert the requested quantity and respond with the result over SPI. The REQADC request is delivered as a "read" command (leading MSB = 0), with the four LSBs indicating the quantity to be read, given in Table 63. A REQADC command/request delivered as a write (leading MSB = 1) is an invalid command and ignored. The REQADC response includes the identical address as the command (ADDR[4:0] = 0x13) followed by the 10-bit data. Rb/W ADDR [4:0] DATA9 DATA8 DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 CRC Bit # [23] [22:18] [17] [16] [15] [14] [13] [12] [11] [10] [9] [8] [7:0] REQADC (request) 0 0x13 — — — — — — AMUX_ SEL [3] AMUX_ SEL [2] AMUX_ SEL [1] AMUX_ SEL [0] — REQADC (response) 0 0x13 ADCVAL [9] ADCVAL [8] ADCVAL [7] ADCVAL [6] ADCVAL [5] ADCVAL [4] ADCVAL [3] ADCVAL [2] ADCVAL [1] ADCVAL [0] — Table 62. REQADC request and response bit readout AMUX_SEL[3:0] AMUX selection reported in REQADC response Other relevant settings 0x00 VCCREG — 0x01 AMUXIN • AMUXINOS[1:0] • AMUXINRNG 0x02 VCC — 0x03 VEE — 0x04 Power device temperature • ITSNS[1:0] • TRNG • TOFST[1:0] 0x05 Die temperature (GH) — 0x06 – 0x0F Not used — Table 63. REQADC request selections See Section 11.12.2 for further information interpreting post-converted results. 11.14.21 BIST request and response (ADDR = 0x14) The REQBIST command reads and reports the results of the latest built-in self-test (BIST) critical for safety- critical, high ASIL-level applications. After completing BIST, send a REQBIST command to elaborate on the result. A circuit passing BIST receives a REQBIST = 0 bit value, a failed circuit is indicated by a REQBIST = 1 bit value. Unlike the BIST itself, the REQBIST request does not need to be initiated while the GD3160 is in configuration mode. REQBIST bits persist until a new BIST is conducted or POR occurs. SPI is inactive while the BIST is running. For other details on the BIST operation, see Section 11.16. For a recommended BIST procedure, see Section 12.2. GD3160 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 13 — 6 May 2024 89 / 114 |
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