GD3160 datasheet(87/114 Pages) NXP

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NXP Semiconductors

GD3160

Advanced IGBT/SiC gate driver

Bit

Bit function

Logic 0

Logic 1

DTFLTA

Select INTx pin to report DTFLT fault to

Report fault on INTB [1]

Report fault on INTA

VREF_UVA

Select INTx pin to report VREF_UV fault to

Report fault on INTB

Report fault on INTA [1]

VEE_OORA

Select INTx pin to report VEE_OOR fault to

Report fault on INTB [1]

Report fault on INTA

[1]

Default value

11.14.18 STATUS3 register (ADDR = 0x11)

The STATUS3 pin reports critical GD3160 control and status pin states, after deglitch. The MCU can monitor

pin state bits (i.e. PWM, PWMALT, FSSTATE, FSENB) to check circuit integrity. A change in the deglitched logic

pin state is reflected in the corresponding bit within 1 µs. The POR recovery bits (POR_1, POR_2) will only

read '1' following a POR event or after BIST operation; they will read '0' following a software reset command or

after writing a '1' to these bits. If INTA is configured to report faults, the INTA and VRTMON may report different

values.

Rb/W

ADDR

[4:0]

DATA9

DATA8

DATA7

DATA6

DATA5

DATA4

DATA3

DATA2

DATA1

DATA0

CRC

Bit #

[23]

[22:18]

[17]

[16]

[15]

[14]

[13]

[12]

[11]

[10]

[9]

[8]

[7:0]

Name/Value

0/1

0x11

POR_1

POR_2

FSISO

PWM

PWMALT

FSSTATE

FSENB

INTB

INTA

VRTMON

—

Default

—

Table 57. STATUS3 register

Bit

Bit function

Logic 0

Logic 1

POR_1

Report LV die recovery from POR

LV die POR recovery bit has been cleared

Notification of LV die recovery from POR

POR_2

Report HV die recovery from POR

HV die POR recovery bit has been cleared

Notification of HV die recovery from POR

FSISO

Report FSISO pin state

FSISO pin is logic low

FSISO pin is logic high

PWM

Report PWM pin state

PWM pin is logic low

PWM pin is logic high

PWMALT

Report PWMALT pin state

PWMALT pin is logic low

PWMALT pin is logic high

FSSTATE

Report FSSTATE pin state

FSSTATE pin is logic low

FSSTATE pin is logic high

FSENB

Report FSENB pin state

FSENB pin is logic low

FSENB pin is logic high

INTB

Report INTB pin state

INTB pin is logic low

INTB pin is logic high

INTA

Report INTA pin state

INTA pin is logic low

INTA pin is logic high

VRTMON

Report the state of the quantity under

real-time monitoring/reporting (VGE)

or reporting (VCE):

• When RTMON_CFG= 0: VGE

• When RTMON_CFG = 1: VCE

[1] [2]

VGE: VGE is low (power device is OFF)

VCE: VCE is high (power device is OFF)

VGE: VGE is high (power device is ON)

VCE: VCE is low (power device is ON)

Table 58. STATUS3 register description

[1]

By default, VRTMON reports the VGE state. This is due to the default RTMON_CFG = 0 in the MODE2 register.

[2]

The RTMON_CFG bit in MODE2 determines the quantity to report to the VTRMON. This must be changed during CONFIG mode.

GD3160

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 13 — 6 May 2024

87 / 114

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