GD3160 datasheet(71/114 Pages) NXP

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NXP Semiconductors

GD3160

Advanced IGBT/SiC gate driver

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R/W[0] + ADDR[4:0] +

DATA[9:8]

MOSI

Commands

sent

Responses

received

SCLK

CSB

CSB low (SPI active) for 24b message length

SCLK clocks in 24b message (shown as 3x bytes for readability)

Breakdown (per byte) of 24-bit command sent

Breakdown (per byte) of 24-bit response received

All responses determined

from previous command

Determines next reply

All commands in

chain are latched at

CSB rising edge

MOSI is always read in on SCLK rising edge

MISO is always updated in on SCLK falling edge

MISO

R/W [0] + ADDR[4:0] +

DATA[9:8]

DATA[7:0]

CRC[7:0]

24-bit message breakdown:

· [23]: Read/Write (1b)

· [22:18]: Address (5b)

· [17:8]: Data (10b)

· [7:0]: CRC (8b)

Figure 36. Single-device SPI message breakdown

11.13.2 SPI CRC

When transmitting a message, both the GD3160 and the SPI master calculate the CRC of the first 16 SPI bits

[23:8] and append an eight bit CRC value as bits [7:0]. This completes the 24-bit SPI message.

The CRC is calculated using the polynomial x8 + x5 + x3 + x2 + x +1 (100101111) with a seed value of binary

11111111 (if the lookup table method is used, the seed value is 0x42). If the CRC of the received message

matches its calculated CRC, then the message was received correctly (for CRC calculation example refer to

"GD31xx Device Driver Example Code" on www.nxp.com/GD3160).

If the CRC of the received message does not match the calculated CRC, there was a receive error and the data

is not saved or used. The error is also logged in the STATUS2 register; the SPIERR bit is set.

Inputdata

0*X7

0*X6

1*X8

0*X4

1*X5

1*X2

1*X3

1*1

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1*X

Figure 37. CRC Polynomial

11.13.3 Protection of register configuration

Most of the SPI registers are protected from inadvertent modification. They are intended to be configured at

power up and left unchanged during normal operation, while the IGBT is being PWMed. This protection ensures

that operating modes, fault masks, fault thresholds, and fault filter times are unchanged unless the GD3160

receives clear instructions to change them.

GD3160

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 13 — 6 May 2024

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