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GD3160 Datasheet(PDF) 92 Page - NXP Semiconductors |
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GD3160 Datasheet(HTML) 92 Page - NXP Semiconductors |
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92 / 114 page ![]() NXP Semiconductors GD3160 Advanced IGBT/SiC gate driver 11.15.4 Managing LV/HV domain communication errors There are several types of communications errors that can occur between the SPI master and the GD3160 or between the low-voltage and high-voltage domains on the GD3160. Table 68 lists the errors that can occur with each message type and how the GD3160 responds to each error. Message type From To Error Response SPI command MCU LV domain The low-voltage domain detects error or framing error The low-voltage domain returns data from last valid command, ignores message, sets SPIERR bit in STATUS 2, latches fault and reports fault at INTB. IGBT state is not changed. SPI command LV domain HV domain The high-voltage domain detects CRC or framing error The high-voltage domain returns data from last valid command and increments its COMERR counter. If count is exceeded: • Sets COMERR bit in STATUS 2 • Latches fault and reports fault at INTB • Turns off IGBT SPI command HV domain LV domain The low-voltage domain detects no response from the high-voltage domain When the WD timer expires, the low-voltage domain latches a WDOG_FLT, reports the fault at INTB, sets WDOG_FLT bit in STATUS 2 and instructs the high-voltage domain to turn off IGBT SPI command HV domain LV domain The low-voltage domain detects CRC or framing error, or last valid data The low-voltage domain returns data from last valid command and increments its COMERR counter. If count is exceeded: • Sets COMERR bit in STATUS 2 • Latches fault and reports fault at INTB • Turns off IGBT SPI command MCU LV domain SPI message delay time is too brief (< 19 µs) The low-voltage domain returns data from last valid command and ignores message. Condition is reported as SPIERR Low-voltage domain to high- voltage domain request ADC command LV domain HV domain The high-voltage domain does not receive any message within the watchdog timeout interval The high-voltage domain sets WDOG_FLT bit in its STATUS 2, latches fault, reports fault at INTB and turns off IGBT Low-voltage domain to high- voltage domain request ADC command LV domain HV domain The high-voltage domain detects CRC or framing error The high-voltage domain returns data from last valid message and increments its error counter. If count is exceeded: • Sets COMERR bit in STATUS 2 • Latches fault and reports fault at INTB • Turns off IGBT Low-voltage domain to high- voltage domain request ADC command HV domain LV domain The low-voltage domain detects no response from the high-voltage domain When the WD timer expires, the low-voltage domain latches a WDOG_FLT, reports the fault at INTB, sets WDOG_FLT bit in STATUS 2 and instructs the high-voltage domain to turn off IGBT low-voltage domain to high- voltage domain request ADC command HV domain LV domain The low-voltage domain detects CRC or framing error The low-voltage domain ignores returned data and increments its error counter. If count is exceeded: • Sets COMERR bit in STATUS 2 • Latches fault and reports fault at INTB • Instructs the high-voltage domain to turn off IGBT Table 68. SPI and LV/HV domain communication error management GD3160 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 13 — 6 May 2024 92 / 114 |
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