PM7346 datasheet(222/419 Pages) PMC

222 / 419 page

PM7346 S/UNI-QJET

DATASHEET

PMC-960835

ISSUE 6

SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3

PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 201

Bit

Type

Function

Default

Bit 7

R/W

INTE

Bit 6

R/W

INTC[6]

Bit 5

R/W

INTC[5]

Bit 4

R/W

INTC[4]

Bit 3

R/W

INTC[3]

Bit 2

R/W

INTC[2]

Bit 1

R/W

INTC[1]

Bit 0

R/W

INTC[0]

INTC[6:0]:

The INTC[6:0] bits control the assertion of FIFO fill level set point interrupts.

The value of INTC[6:0] = ‘b0000000 sets the interrupt FIFO fill level to 128.

INTE:

The Interrupt Enable bit (INTE) must set to logic 1 to allow the internal

interrupt status to be propagated to the INTB output. When the INTE bit is

logic 0 the RDLC will not assert INTB.

The contents of the Interrupt Control Register should only be changed when the

EN bit in the RDLC Configuration Register is logic 0. This prevents any

erroneous interrupt generation.

PM7346 Datasheet(PDF) 222 Page - PMC-Sierra, Inc

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