PM7346 datasheet(229/419 Pages) PMC

229 / 419 page

PM7346 S/UNI-QJET

DATASHEET

PMC-960835

ISSUE 6

SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3

PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 208

Bit

Type

Function

Default

Bit 7

R/W

FLGSHARE

Bit 6

R/W

FIFOCLR

Bit 5

R/W

Reserved

Bit 4

Unused

Bit 3

R/W

EOM

Bit 2

R/W

ABT

Bit 1

R/W

CRC

Bit 0

R/W

Consecutive writes to the TDPR Configuration, TDPR Interrupt Status/UDR

Clear, and TDPR Transmit Data register and reads of the TDPR Interrupt

Status/UDR Clear register should not occur at rates greater than 1/8th that of the

clock selected by the LINESYSCLK bit of the S/UNI-QJET Misc. register (09BH,

19BH, 29BH, 39BH).

EN:

The EN bit enables the TDPR functions. When EN is set to logic 1, the TDPR

is enabled and flag sequences are sent until data is written into the TDPR

Transmit Data register. When the EN bit is set to logic 0, the TDPR is

disabled and an all 1's Idle sequence is transmitted on the datalink.

CRC:

The CRC enable bit controls the generation of the CCITT_CRC frame check

sequence (FCS). Setting the CRC bit to logic 1 enables the CCITT-CRC

generator and appends the 16-bit FCS to the end of each message. When

the CRC bit is set to logic 0, the FCS is not appended to the end of the

message. The CRC type used is the CCITT-CRC with generator polynomial

x16 + x12 + x5 + 1. The high order bit of the FCS word is transmitted first.

ABT:

The Abort (ABT) bit controls the sending of the 7 consecutive ones HDLC

abort code. Setting the ABT bit to a logic 1 causes the 01111111 code (the 0

is transmitted first) to be transmitted after the current byte from the TDPR

FIFO is transmitted. The TDPR FIFO is then reset. All data in the TDPR

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