| Electronic Components Datasheet Search |
|
TMPR3916 Datasheet(PDF) 116 Page - Toshiba Semiconductor |
|
|
|||||||||||||||||||||||||||||
TMPR3916 Datasheet(HTML) 116 Page - Toshiba Semiconductor |
|
116 / 225 page ![]() Chapter 6 Direct Memory Access Controller (DMAC) Preliminary 6-3 4. memory >> device: Write the value 0xA9 into the Operation Definition Register (ODR). device >> memory: Write the value 0x69 into the Operation Definition Register (ODR). Write the value 0x11 into the Channel Control Register (CCR). Now the DMA Controller waits for a request of the external device to start the first transfer. 5. Configure and start the devices TXSEI or UART. After DMA transaction has finished, the DMA Controller sets the OPC bit (bit 0) in the Channel Status Register (CSR) and generates an interrupt. Each channel has its own interrupt signal. The interrupts are only maskable in the Interrupt Controller. To terminate a running DMA transaction, set bit 22 (ABT) in the Channel Control Register (CCR). 6.1.2 Start DMA with External Device The TMPR3916 has one pin for an external DMA request signal. For instance the external request makes sense together with a PORT module. The procedure is similar to a UART/ TXSEI transaction. For details of the procedure see section “Start DMA transaction between memory and TXSEI/UART” and the register description. The following steps are executed to start a DMA transaction: 1. Write the hexadecimal-value 0xA in • bits [3:0] of the Chip Configuration Register (CCR) for channel 0 • bits [7:4] of the Chip Configuration Register (CCR) for channel 1 2. Define source and destination address in registers SAR and DAR. 3. Write the number of bytes you want to transfer into BCR. 4. Write the following value into ODR: Application Memory >> Device (transmit) Device >> Memory (receive) Edge detection on external request 0xA8 0x68 Level detection on external request 0xA9 0x69 Write the following value into CCR: Application Memory >> Device (transmit) Device >> Memory (receive) Positive logic on external request 0x19 0x19 Negative logic on external request 0x11 0x11 Now the DMA Controller waits for a request of the external device to start the first transfer. 5. Configure and start external device. When the DMA Controller starts its first transfer, it sets the external acknowledge signal to 0. After finishing the whole DMA transaction, the DMA Controller sets the external acknowledge signal to 1. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |