RZSLASHG3E datasheet(101/112 Pages) RENESAS

101 / 112 page

RZ/G3E Group

3. Electrical Characteristics

R01DS0477EJ0115 Rev.1.15

Page 101 of 112

Nov 28, 2025

3.5.27

LVDS Interface

Table 3.34

LVDS IF Timing

Item

Symbol

Min.

Typ.

Max.

Unit

Figures

Output Clock Frequency of LVDS

FCLKP/CLKN 25

—

MHz

Figure 3.73

Output Clock of LVDS

TCP

11.494

—

Output Data Rate of LVDS

FDAP/DAN

175

—

609

Mbps

LVDS Output Pulse Position 0

TPPOS0

−0.200

0.200

LVDS Output Pulse Position 1

TPPOS1

(TCP/7) − 0.200

(TCP/7)

(TCP/7) + 0.200

LVDS Output Pulse Position 2

TPPOS2

2(TCP/7) − 0.200

2(TCP/7)

2(TCP/7) + 0.200

LVDS Output Pulse Position 3

TPPOS3

3(TCP/7) − 0.200

3(TCP/7)

3(TCP/7) + 0.200

LVDS Output Pulse Position 4

TPPOS4

4(TCP/7) − 0.200

4(TCP/7)

4(TCP/7) + 0.200

LVDS Output Pulse Position 5

TPPOS5

5(TCP/7) − 0.200

5(TCP/7)

5(TCP/7) + 0.200

LVDS Output Pulse Position 6

TPPOS6

6(TCP/7) − 0.200

6(TCP/7)

6(TCP/7) + 0.200

1/FDAP/DAN

TPPOS0

LVDS0/1_CLKP/N

LVDS0/1_DATAnP/N

(n = 0 to 3)

TCP = 1/FDAP/DAN

TPPOS1

TPPOS2

TPPOS3

TPPOS4

TPPOS5

TPPOS6

Figure 3.73

TCP, FDAP/DAN, TPPOS

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