XC2000 datasheet(57/647 Pages) INFINEON

57 / 647 page

XC2000 Derivatives

System Units (Vol. 1 of 2)

Architectural Overview

Preliminary

User’s Manual

2-29

V1.0, 2007-06

ArchitectureX2K, V1.0

MultiCAN Features

• CAN functionality conforms to CAN specification V2.0 B active for each CAN node

(compliant to ISO 11898)

• Up to Five independent CAN nodes

• Up to 128 independent message objects (shared by the CAN nodes)

• Dedicated control registers for each CAN node

• Data transfer rate up to 1 Mbit/s, individually programmable for each node

• Flexible and powerful message transfer control and error handling capabilities

• Full-CAN functionality for message objects:

– Can be assigned to one of the CAN nodes

– Configurable as transmit or receive objects, or as message buffer FIFO

– Handle 11-bit or 29-bit identifiers with programmable acceptance mask for filtering

– Remote Monitoring Mode, and frame counter for monitoring

• Automatic Gateway Mode support

• 16 individually programmable interrupt nodes

• Analyzer mode for CAN bus monitoring

Watchdog Timer

The Watchdog Timer represents one of the fail-safe mechanisms which have been

implemented to prevent the controller from malfunctioning for longer periods of time.

The Watchdog Timer is always enabled after a reset of the chip, and can be disabled

and enabled at any time by executing instructions DISWDT and ENWDT. Thus, the

chip’s start-up procedure is always monitored. The software has to be designed to restart

the Watchdog Timer before it overflows. If, due to hardware or software related failures,

the software fails to do so, the Watchdog Timer overflows and generates an internal

hardware reset and pulls the RSTOUT pin low in order to allow external hardware

components to be reset.

The Watchdog Timer is a 16-bit timer, clocked with the system clock divided by 16,384

or 256. The high byte of the Watchdog Timer register can be set to a prespecified reload

value (stored in WDTREL) to allow further variation of the monitored time interval. Each

time it is serviced by the application software, the high byte of the Watchdog Timer is

reloaded and the low byte is cleared.

Thus, time intervals between 3.9

µs and 16.3 s can be monitored (@ 66 MHz).

The default Watchdog Timer interval after reset is 6.5 ms (@ 10 MHz).

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