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XC2000 Datasheet(PDF) 63 Page - Infineon Technologies AG |
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XC2000 Datasheet(HTML) 63 Page - Infineon Technologies AG |
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63 / 647 page ![]() XC2000 Derivatives System Units (Vol. 1 of 2) Memory Organization Preliminary User’s Manual 3-1 V1.0, 2007-06 MemoryX2K, V1.1 3 Memory Organization The memory space of the XC2000 is configured in a “Von Neumann” architecture. This means that code and data are accessed within the same linear address space. All of the physically separated memory areas, including internal ROM and Flash, internal RAM, the internal Special Function Register Areas (SFRs and ESFRs), the internal IO area, and external memory are mapped into one common address space. Figure 3-1 Address Space Overview External Memory Area On-Chip Program Memory Areas mc_xc16x_mmap.vsd 239...224 223...208 191...176 175...160 159...144 143...128 127...112 111...96 95...80 79...64 63...48 47...32 31...16 15...0 00’0000 H C0’0000 H FF’FFFF H 40’0000 H 80’0000 H Total Address Space 16 Mbytes, Segments 255...0 255...240 207...192 20’0000 H 60’0000 H A0’0000 H E0’0000 H External IO Area External Memory Area |
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