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XC2000 Datasheet(PDF) 62 Page - Infineon Technologies AG |
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XC2000 Datasheet(HTML) 62 Page - Infineon Technologies AG |
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62 / 647 page ![]() XC2000 Derivatives System Units (Vol. 1 of 2) Architectural Overview Preliminary User’s Manual 2-34 V1.0, 2007-06 ArchitectureX2K, V1.0 2.6 On-Chip Debug Support (OCDS) The On-Chip Debug Support system provides a broad range of debug and emulation features built into the XC2000. The user software running on the XC2000 can thus be debugged within the target system environment. The OCDS is controlled by an external debugging device via the debug interface, consisting of the IEEE-1149-conforming JTAG port and a break interface. The debugger controls the OCDS via a set of dedicated registers accessible via the JTAG interface. Additionally, the OCDS system can be controlled by the CPU, e.g. by a monitor program. An injection interface allows the execution of OCDS-generated instructions by the CPU. Multiple breakpoints can be triggered by on-chip hardware, by software, or by an external trigger input. Single stepping is supported as well as the injection of arbitrary instructions and read/write access to the complete internal address space. A breakpoint trigger can be answered with a CPU-halt, a monitor call, a data transfer, or/and the activation of an external signal. The data transferred at a watchpoint (see above) can be obtained via the JTAG interface or via the external bus interface for increased performance. The debug interface uses a set of 6 interface signals (4 JTAG lines, 2 break lines) to communicate with external circuitry. These interface signals use dedicated pins. Complete system emulation is supported by an emulation device. Via this full-featured emulation interface (including internal buses, control, status, and pad signals) the functions of the XC2000 chip can be emulated in an emulation system. |
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