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XC2000 Datasheet(PDF) 61 Page - Infineon Technologies AG |
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XC2000 Datasheet(HTML) 61 Page - Infineon Technologies AG |
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61 / 647 page ![]() XC2000 Derivatives System Units (Vol. 1 of 2) Architectural Overview Preliminary User’s Manual 2-33 V1.0, 2007-06 ArchitectureX2K, V1.0 2.5 Power Management The XC2000 provides several means to control the power it consumes either at a given time or averaged over a certain timespan. Three mechanisms can be used (partly in parallel): • Supply Voltage Management allows the temporary reduction of the supply voltage of major parts of the logic, or even the complete disconnection. This drastically reduces the power consumed because of leakage current, in particular at high temperature. Several power reduction modes provide the optimal balance of power reduction and wake-up time. • Clock Generation Management controls the distribution and the frequency of internal and external clock signals. While the clock signals for currently inactive parts of logic are disabled automatically, the user can reduce the XC2000’s CPU clock frequency which drastically reduces the consumed power. External circuitry can be controlled via the programmable frequency output FOUT. • Peripheral Management permits temporary disabling of peripheral modules. Each peripheral can separately be disabled/enabled. Also the CPU can be switched off while the peripherals can continue to operate. Wake-up from power reduction modes can be triggered either externally by signals generated by the external system, or internally by the on-chip wake-up timer, which supports intermittent operation of the XC2000 by generating cyclic wake-up signals. This offers full performance to quickly react on action requests while the intermittent sleep phases greatly reduce the average power consumption of the system. Note: When selecting the supply voltage and the clock source and generation method, the required parameters must be carefully written to the respective bitfields, to avoid unintended intermediate states. Recommended sequences are provided which ensure the intended operation of power supply system and clock system. |
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