AS3524 datasheet(119/124 Pages) AMSCO

119 / 124 page

AS3524 C21 / C22

austriamicrosystems

Data Sheet, Confidential

www.austriamicrosystems.com

Revision 1.11

119

- 124

6.3.1.7

D IO ST PU LSR

6.3.1.8

D IO ST PD LSR

Figure 51 Digital Schmitt Trigger Input with Pull-Up and Limited

Slew Rate Output

PAD

Schmitt

Figure 52 Digital Schmitt Trigger Input with Pull-Down and Limited

Slew Rate Output

PAD

Schmitt

6.3.1.9

D OUT LSR LV

6.3.1.10 D IO ST PD LSR LV

Figure 53 Digital Output with Limited Slew Rate (low voltage)

PAD

Figure 54 Digital Schmitt Trigger Input with Pull-Down and Limited

Slew Rate Output (low voltage)

PAD

Schmitt

Appendix

7.1

Memory MAP

ARM922T provides 32-bit address to access the peripherals and memory. With this 32-bit address ARM922T can access up to 4 Giga

Bytes of memory. Cocoa does not use the complete 4 GB address space.

Address 0x0000_0000 is mapped to internal ROM or External Memory interface based on the boot ROM selection by the external input

pin (Port C, xpc[0] = intBootSel) Pin intBootSel=1 at startup selects the internal ROM, intBootSel = 0 selects the external memory.

The address range starting at 0x0000_0000 is also mapped to internal RAM upon setting of the remap bit. This remap allows the user to

select either RAM or ROM at 0x0000_0000.

Table 84 Address Map

S.No

Start (Base)

Address

End Address

Actual

Block Size

Peripheral

Comment

AHB Blocks

0x0000_0000

0x0001_FFFF

128 KByte

Internal ROM

Remap = 0 and

IntBootSel = 1

0x0000_0000

0x003F_FFFF

4 MB

External Memory IF

(MPMC Bank1 – Ext

Flash or Ext ROM)

Remap = 0 and

IntBootSel = 0

0x0000_0000

0x0004_FFFF

320 KByte

Embedded 1T-RAM

Remap = 1

0x0100_0000

0x0FFF_FFFF

Reserved

0x1000_0000

0x103F_FFFF

4 MB

External Memory IF

Aliased

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