C508 datasheet(73/93 Pages) INFINEON

73 / 93 page

C508

Data Sheet

2000-08

Notes:

1) Applicable to C508-4E only.

2) Applicable to C508-4R only.

3) Capacitive loading on ports 0 and 2 may cause spurious noise pulses to be superimposed on the V

OL of ALE

and port 3. The noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these

pins make 1-to-0 transitions during bus operation. In the worst case (capacitive loading > 100 pF), the noise

pulse on ALE line may exceed 0.8 V. In such cases it may be desirable to qualify ALE with a Schmitt-trigger,

or use an address latch with a Schmitt-trigger strobe input.

4) Capacitive loading on ports 0 and 2 may cause the V

OH on ALE and PSEN to momentarily fall below the

0.9

VDD specification when the address lines are stabilizing.

5) I

PD (power-down mode) is measured under following conditions:

EA = Port 0 =

VSS; RESET = VSS; XTAL2 = N.C.; XTAL1 = VSS; VAGND = VSS; VAREF = VDD; all other pins

are disconnected.

6) I

DD (active mode) is measured with:

XTAL1 driven with

tR, tF =5ns, VIL = VSS + 0.5 V, VIH = VDD – 0.5 V; XTAL2 = N.C.;

EA =Port 0=

VDD; RESET = VDD; all other pins are disconnected. IDD would be slightly higher if the crystal

oscillator is used (approx. 1 mA).

7) I

DD (idle mode) is measured with all output pins disconnected and with all peripherals disabled;

XTAL1 driven with

tR , tF = 5 ns, VIL = VSS +0.5 V, VIH = VDD – 0.5 V; XTAL2 = N.C.;

RESET = EA =

VSS; Port0 = VDD ; all other pins are disconnected.

8) I

DD (active mode with slow-down mode) is measured with all output pins disconnected and with all peripherals

disabled; XTAL1 driven with

tR, tF =5ns, VIL = VSS + 0.5 V, VIH = VDD – 0.5 V; XTAL2 = N.C.;

RESET = EA =

VSS; Port0 = VDD; all other pins are disconnected; the microcontroller is put into slow-down

mode by software.

9) I

DD (idle mode with slow-down mode) is measured all output pins disconnected and with all peripherals

disabled; XTAL1 driven with

tR, tF =5ns, VIL = VSS + 0.5 V, VIH = VDD – 0.5 V; XTAL2 = N.C.;

RESET = EA =

VSS; Port0 = VDD; all other pins are disconnected; the microcontroller is put into idle mode with

slow-down mode enabled by software.

10) Overload conditions under operating conditions are exceeded, i.e. the voltage on any pin exceeds the specified

range (i.e.

VOV > VDD + 0.5 V or VOV < VSS – 0.5 V). The absolute sum of input currents on all port pins may

not exceed 50 mA. The supply voltage

VDD and VSS must remain within the specified limits.

11) Not 100% tested, guaranteed by design characterization

12) The typical I

DD values are periodically measured at TA = + 25 °C but not 100% tested.

13) The maximum I

DD values are measured under worst case conditions (TA = 0 °C or – 40 °C and VDD =5.5 V).

C508 Datasheet(PDF) 73 Page - Infineon Technologies AG

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