C508 datasheet(11/93 Pages) INFINEON

11 / 93 page

C508

Data Sheet

2000-08

RESET 1

RESET

A high level on this pin for one machine cycle

while the oscillator is running resets the device.

An internal diffused resistor to

VSS permits

power-on reset using only an external

capacitor to

VDD.

P3.0-

P3.7

33 - 40

41 - 48

I/O

Port 3

is an 8-bit quasi-bidirectional port with internal

pull-up transistors. Port 3 pins that have “1”s

written to them are pulled high by the internal

pull-up transistors and in that state can be used

as inputs. As inputs, Port 3 pins being

externally pulled low will source current (

IIL, in

the DC characteristics) because of the internal

pullup transistors. The output latch

corresponding secondary function must be

programmed to a one (1) for that function to

operate (except for TxD and WR).

The secondary functions are assigned to the

pins of Port 3 as follows:

P3.0/RxD

Receiver data input (asynch.) or

data input/output (synch.) of serial

interface

P3.1/TxD

Transmitter data output (asynch.)

or clock output (synch.) of serial

interface

P3.2/INT0

External interrupt 0 input/timer 0

gate control input

P3.3/INT1

External interrupt 1 input/timer 1

gate control input

P3.4/T0

Timer 0 counter input

P3.5/T1

Timer 1 counter input

P3.6/WR

WR control output; latches the

data byte from port 0 into the

external data memory

P3.7/RD

RD control output; enables the

external data memory

Table 1

Pin Defintions and Functions (cont’d)

Sym-

bol

Pin Numbers

I/O1) Function

P-MQFP-64 P-SDIP-64

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