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C508 Datasheet(PDF) 29 Page - Infineon Technologies AG

Part # C508
Description  8-Bit CMOS Microcontroller
PDF  93 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

C508 Datasheet(HTML) 29 Page - Infineon Technologies AG

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C508
Data Sheet
25
2000-08
Parallel I/O
The C508 has one 8-bit analog or digital input port and five 8-bit I/O ports. Port 4 is a uni-
directional input port. Port 0 is an open-drain bi-directional I/O port, while Ports 1, 2, 3
and 5 are quasi-bi-directional I/O ports with internal pullup transistors. That means, when
configured as inputs, these ports will be pulled high and will source current when
externally pulled low. Port 0 will float when configured as input.
The output drivers of Ports 0 and 2 and the input buffers of Port 0 are also used for
accessing external memory. In this application, Port 0 outputs the low byte of the
external memory address, time multiplexed with the byte being written or read. Port 2
F1H
CT2CON 0001-
0000B
CT2P
ECT2O STE2
CT2
RES
CT2R
CLK2
CLK1
CLK0
F2H
CCL0
00H
.7
.6
.5
.4
.3
.2
.1
.0
F3H
CCH0
00H
.7
.6
.5
.4
.3
.2
.1
.0
F4H
CCL1
00H
.7
.6
.5
.4
.3
.2
.1
.0
F5H
CCH1
00H
.7
.6
.5
.4
.3
.2
.1
.0
F6H
CCL2
00H
.7
.6
.5
.4
.3
.2
.1
.0
F7H
CCH2
00H
.7
.6
.5
.4
.3
.2
.1
.0
F8H
2)
P5
FFH
.7
.6
.5
.4
.3
.2
.1
.0
F9H
COTRAP 00H
BCT
SEL
PDTEN COUT
2T
CC2T
COUT
1T
CC1T
COUT
0T
CC0T
FBH
EINT
XX00-
0000B
–
–
IEX9
I9FR
IEX8
I8FR
IEX7
I7FR
FCH
3)4) VR0
C5H
11
000
101
FDH
3)4) VR1
08H
00
001
000
FEH
3)4) VR2
5)
.7
.6
.5
.4
.3
.2
.1
.0
FFH
TRCON
00H
TRPEN TRF
TREN5 TREN4 TREN3 TREN2 TREN1 TREN0
1) “X” means that the value is undefined and the location is reserved.
2) Bit-addressable special function registers
3) SFR is located in the mapped SFR area. For accessing this SFR, bit RMAP in SFR SYSCON must be set.
4) These are read-only registers.
5) The content of this SFR varies with the actual step of the C508 (e.g. 01
H for C508-4E, first step and 11H for
C508-4R, first step).
Table 3
Contents of the SFRs, SFRs in Numeric Order
of their Addresses (cont’d)
Addr.
Register Content
after
Reset1)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0



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