ADSP-BF705BBCZ-4 datasheet(83/116 Pages) AD

83 / 116 page

Rev. A

Page 83 of 116

September 2015

ADSP-BF700/701/702/703/704/705/706/707

The SPT_TDV output signal becomes active in SPORT multichannel mode. During transmit slots (enabled with active channel selection

registers) the SPT_TDV is asserted for communication with external devices.

Table 52. Serial Ports—Transmit Data Valid (TDV)

VDD_EXT

1.8V Nominal

VDD_EXT

3.3V Nominal

Parameter

Min

Max

Min

Max

Unit

Switching Characteristics

tDRDVEN

Data-Valid Enable Delay from Drive Edge of External Clock1

1 Referenced to drive edge.

2.5

tDFDVEN

Data-Valid Disable Delay from Drive Edge of External Clock1

17.5

14.5

tDRDVIN

Data-Valid Enable Delay from Drive Edge of Internal Clock

–4.5

–3.5

tDFDVIN

Data-Valid Disable Delay from Drive Edge of Internal Clock

Figure 29. Serial Ports—Transmit Data Valid Internal and External Clock

DRIVE EDGE

SPT_CLK

(SPORT CLOCK

EXTERNAL)

tDRDVEN

tDFDVEN

DRIVE EDGE

SPT_CLK

(SPORT CLOCK

INTERNAL)

tDRDVIN

tDFDVIN

SPT_A/BTDV

ADSP-BF705BBCZ-4 Datasheet(PDF) 83 Page - Analog Devices

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