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ADSP-BF705BBCZ-4 Datasheet(PDF) 84 Page - Analog Devices |
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ADSP-BF705BBCZ-4 Datasheet(HTML) 84 Page - Analog Devices |
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84 / 116 page ![]() Rev. A | Page 84 of 116 | September 2015 ADSP-BF700/701/702/703/704/705/706/707 Table 53. Serial Ports—External Late Frame Sync VDD_EXT 1.8V Nominal VDD_EXT 3.3V Nominal Parameter Min Max Min Max Unit Switching Characteristics tDDTLFSE Data Delay from Late External Transmit Frame Sync or External Receive Frame Sync with MCE = 1, MFD = 0 1 19 15.5 ns tDDTENFS Data Enable for MCE = 1, MFD = 0 1 0.5 0.5 ns 1 The tDDTLFSE and tDDTENFS parameters apply to left-justified as well as standard serial mode, and MCE = 1, MFD = 0. Figure 30. External Late Frame Sync DRIVE SAMPLE 2ND BIT 1ST BIT DRIVE tDDTE/I tHDTE/I tDDTLFSE tDDTENFS tSFSE/I tHFSE/I SPT_A/BDx (DATA CHANNEL A/B) SPT_A/BFS (FRAME SYNC) SPT_A/BCLK (SPORT CLOCK) |
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