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DM504 Datasheet(PDF) 19 Page - Texas Instruments |
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DM504 Datasheet(HTML) 19 Page - Texas Instruments |
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19 / 211 page ![]() Copyright © 2016–2017, Texas Instruments Incorporated Terminal Configuration and Functions Submit Documentation Feedback 19 DM504 www.ti.com SPRS977A – NOVEMBER 2016 – REVISED JANUARY 2017 Table 4-1. Pin Attributes(1) (continued) BALL NUMBER BOTTOM [1] BALL NUMBER TOP [2] BALL NAME [3] SIGNAL NAME [4] MUXMODE [5] TYPE [6] BALL RESET STATE [7] BALL RESET REL. STATE [8] BALL RESET REL. MUXMODE [9] I/O VOLTAGE VALUE [10] POWER [11] HYS [12] BUFFER TYPE [13] PULL UP/DOWN TYPE [14] DSIS [15] C10 rgmii0_txd3 rgmii0_txd3 0 O PD PD 15 1.8/3.3 vddshv4 Yes Dual Voltage LVCMOS PU/PD mmc_dat0 5 IO 1 gpio3_21 14 IO Driver off 15 I E3 rstoutn rstoutn 0 O PD drive 1 (OFF) 1.8/3.3 vddshv1 Yes Dual Voltage LVCMOS PU/PD G3 rtck rtck 0 O PU drive clk (OFF) 0 1.8/3.3 vddshv1 Yes Dual Voltage LVCMOS PU/PD gpio4_27 14 IO Driver off 15 I N3 spi1_cs0 spi1_cs0 0 IO PU PU 15 1.8/3.3 vddshv1 Yes Dual Voltage LVCMOS PU/PD 1 uart3_txd 1 O gpio4_3 14 IO Driver off 15 I N2 spi1_cs1 spi1_cs1 0 IO PU PU 15 1.8/3.3 vddshv1 Yes Dual Voltage LVCMOS PU/PD 1 spi3_cs1 1 IO 1 timer6 4 IO ehrpwm1_tripzone_input 7 IO 0 gpio4_4 14 IO Driver off 15 I N1 spi1_d0 spi1_d0 0 IO OFF OFF 15 1.8/3.3 vddshv1 Yes Dual Voltage LVCMOS PU/PD 0 uart3_rtsn 1 O gpio4_2 14 IO sysboot9 15 I R3 spi1_d1 spi1_d1 0 IO OFF OFF 15 1.8/3.3 vddshv1 Yes Dual Voltage LVCMOS PU/PD 0 uart3_ctsn 1 I 1 gpio4_1 14 IO sysboot8 15 I P2 spi1_sclk spi1_sclk 0 IO PD PD 15 1.8/3.3 vddshv1 Yes Dual Voltage LVCMOS PU/PD 0 uart3_rxd 1 I 1 gpio4_0 14 IO Driver off 15 I L3 spi2_cs0 spi2_cs0 0 IO PU PU 15 1.8/3.3 vddshv1 Yes Dual Voltage LVCMOS PU/PD 1 uart3_txd 1 O ehrpwm1B 2 O timer4 3 IO gpio4_8 14 IO Driver off 15 I |
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