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DM504 Datasheet(PDF) 43 Page - Texas Instruments

Part # DM504
Description  SoC for Vision Analytics 12mm Package (ABE) Silicon Revision 2.0
PDF  211 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

DM504 Datasheet(HTML) 43 Page - Texas Instruments

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DM504
www.ti.com
SPRS977A – NOVEMBER 2016 – REVISED JANUARY 2017
Submit Documentation Feedback
Terminal Configuration and Functions
Copyright © 2016–2017, Texas Instruments Incorporated
Table 4-14. QSPI Signal Descriptions (continued)
SIGNAL NAME
DESCRIPTION
TYPE
BOTTOM BALL
TOP BALL
qspi1_cs0
QSPI1 Chip Select[0]. This pin is Used for QSPI1 boot modes.
IO
A4
K2
qspi1_cs1
QSPI1 Chip Select[1]
IO
C6
4.3.14 McASP
NOTE
For more information, see the Serial Communication Interface / Multichannel Audio Serial
Port (McASP) section of the device TRM.
CAUTION
The IO timings provided in Section 5.9 Timing Requirements and Switching
Characteristics are only valid if signals within a single IOSET are used. The
IOSETs are defined in Table 5-52.
Table 4-15. McASP Signal Descriptions
SIGNAL NAME
DESCRIPTION
TYPE
BALL
Multichannel Audio Serial Port 1
mcasp1_axr0
McASP1 Transmit/Receive Data
IO
U13
mcasp1_axr1
McASP1 Transmit/Receive Data
IO
U12
mcasp1_axr2
McASP1 Transmit/Receive Data
IO
T12
mcasp1_axr3
McASP1 Transmit/Receive Data
IO
T6
mcasp1_axr4
McASP1 Transmit/Receive Data
IO
T14
mcasp1_axr5
McASP1 Transmit/Receive Data
IO
R13
mcasp1_axr6
McASP1 Transmit/Receive Data
IO
R12
mcasp1_axr7
McASP1 Transmit/Receive Data
IO
U11
mcasp1_axr8
McASP1 Transmit/Receive Data
IO
P12
mcasp1_axr9
McASP1 Transmit/Receive Data
IO
T11
mcasp1_axr10
McASP1 Transmit/Receive Data
IO
R11
mcasp1_axr11
McASP1 Transmit/Receive Data
IO
R10
mcasp1_axr12
McASP1 Transmit/Receive Data
IO
T10
mcasp1_axr13
McASP1 Transmit/Receive Data
IO
T6, T9, U11
mcasp1_axr14
McASP1 Transmit/Receive Data
IO
P12, U6, U9
mcasp1_axr15
McASP1 Transmit/Receive Data
IO
R6, R9, T11
mcasp1_fsx
McASP1 Transmit Frame Sync
IO
R11, T5, T8
mcasp1_aclkr
McASP1 Receive Bit Clock
IO
R10, R5, U7
mcasp1_fsr
McASP1 Receive Frame Sync
IO
R8, T10, U4
mcasp1_ahclkx
McASP1 Transmit High-Frequency Master Clock
IO
R7, T4
mcasp1_aclkx
McASP1 Transmit Bit Clock
IO
T7, U3
Multichannel Audio Serial Port 2
mcasp2_axr0
McASP2 Transmit/Receive Data
IO
R6
mcasp2_axr1
McASP2 Transmit/Receive Data
IO
T5
mcasp2_axr2
McASP2 Transmit/Receive Data
IO
R5
mcasp2_axr3
McASP2 Transmit/Receive Data
IO
U4
mcasp2_axr4
McASP2 Transmit/Receive Data
IO
T4
mcasp2_axr5
McASP2 Transmit/Receive Data
IO
U3



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