DM504 datasheet(91/211 Pages) TI1

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vssa_osc0

Device

xo_osc0

xi_osc0

SPRS91v_CLK_03

DM504

www.ti.com

SPRS977A – NOVEMBER 2016 – REVISED JANUARY 2017

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Specifications

(1) Crystal characteristics should account for tolerance+stability+aging.

When selecting a crystal, the system design must consider the temperature and aging characteristics of a

based on the worst case environment and expected life expectancy of the system.

Table 5-19 details the switching characteristics of the oscillator and the requirements of the input clock.

Table 5-19. Oscillator Switching Characteristics—Crystal Mode

NAME

DESCRIPTION

MIN

TYP

MAX

UNIT

Oscillation frequency

19.2, 20, 27 MHz

MHz

tsX

Start-up time

5.9.4.1.2 OSC0 Input Clock

A 1.8-V LVCMOS-Compatible Clock Input can be used instead of the internal oscillator to provide the

SYS_CLK1 clock input to the system. The external connections to support this are shown in Figure 5-7.

The xi_osc0 pin is connected to the 1.8-V LVCMOS-Compatible clock source. The xi_osc0 pin is left

unconnected. The vssa_osc0 pin is connected to board ground (VSS).

Figure 5-7. 1.8-V LVCMOS-Compatible Clock Input

Table 5-20 summarizes the OSC0 input clock electrical characteristics.

Table 5-20. OSC0 Input Clock Electrical Characteristics—Bypass Mode

NAME

DESCRIPTION

MIN

TYP

MAX

UNIT

Frequency

19.2, 20, 27

MHz

CIN

Input capacitance

2.184

2.384

2.584

IIN

Input current (3.3V mode)

µA

Table 5-21 details the OSC0 input clock timing requirements.

Table 5-21. OSC0 Input Clock Timing Requirements

NAME

DESCRIPTION

MIN

TYP

MAX

UNIT

CK0

1 / tc(xiosc0)

Frequency, xi_osc0

19.2, 20, 27

MHz

CK1

tw(xiosc0)

Pulse duration, xi_osc0 low or high

0.45 × tc(xiosc0)

0.55 × tc(xiosc0)

tj(xiosc0)

Period jitter(1), xi_osc0

0.01 × tc(xiosc0)

tR(xiosc0)

Rise time, xi_osc0

tF(xiosc0)

Fall time, xi_osc0

DM504 Datasheet(PDF) 91 Page - Texas Instruments

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