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DM504 Datasheet(PDF) 85 Page - Texas Instruments |
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DM504 Datasheet(HTML) 85 Page - Texas Instruments |
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85 / 211 page ![]() 85 DM504 www.ti.com SPRS977A – NOVEMBER 2016 – REVISED JANUARY 2017 Submit Documentation Feedback Specifications Copyright © 2016–2017, Texas Instruments Incorporated Table 5-17. Timing Parameters (continued) SUBSCRIPTS SYMBOL PARAMETER V Valid IV Invalid AE Active Edge FE First Edge LE Last Edge Z High impedance 5.9.2 Interface Clock Specifications 5.9.2.1 Interface Clock Terminology The interface clock is used at the system level to sequence the data and/or to control transfers accordingly with the interface protocol. 5.9.2.2 Interface Clock Frequency The two interface clock characteristics are: • The maximum clock frequency • The maximum operating frequency The interface clock frequency documented in this document is the maximum clock frequency, which corresponds to the maximum frequency programmable on this output clock. This frequency defines the maximum limit supported by the Device IC and does not take into account any system consideration (PCB, peripherals). The system designer will have to consider these system considerations and the Device IC timing characteristics as well to define properly the maximum operating frequency that corresponds to the maximum frequency supported to transfer the data on this interface. |
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