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DP8496 Datasheet(PDF) 30 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # DP8496
Description  SCSI-2 Disk Data Controller
PDF  92 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP8496 Datasheet(HTML) 30 Page - National Semiconductor (TI)

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40 Functional Description (Continued)
TABLE 414 Register Addresses for Format of ID Segment (Hex)
PSIG
Hdr
Hdr
Snyc1
Snyc2
Hdr0
Hdr1
Hdr2
Hdr3
Hdr4
Hdr5
CRC
Hdr
Gap
Prmbl
ECC
Post
Pattern
3A
22
22
24
25
27
28
2A
2B
2D
2E
auto
30
Control
20
21
21
23
23
26
26
29
29
2C
2C
2F
2F
Range
1 – FF
1 – 7
0 – 1F
0 – 7
0 – 1F
0 – 1
0 – 1
0 – 1
0 – 1
0 – 1
0 – 1
0 – 7
3 – 1F
TABLE 415 Register Addresses for Format of Data Segment (Hex)
Data
Data
Sync1
Sync2
Data Field
CRC
Data
Gap3
Gap
Prmbl
ECC
Post
Pattern
22
22
33
34
37
auto
30
3A
Control
31
31
32
32
35 36
38
38
39
Range
1 – 7
0 – 1F
0 – 7
0 – 1F
10 – FFFE (Must Be Even)
0 – 7
1 – 1F
1 – FF
Header Preamble
Sets the number of bytes in the Header Preamble for the
PLL to lock to The pattern used is from the Preamble Pat-
tern register Range is 0 – 1F
Preamble Pattern (PREP)
22h
RW
76543210
Pattern
Pattern used for the Header Gap Header Preamble Data
Gap and Data Preamble fields This pattern must be all
zeros for a soft-sectored drive
Header Sync
1
2 Count (HSC) 23h
RW
76543210
Synch
1
Synch
2
Sets the number of bytes in the Synch
1 and Synch
2
fields The range of Synch
1 is 0 – 7 The range of Synch
2is0 – 1F
Both Synch
1 and Synch
2 cannot be zero
At least one must be non-zero
For soft sectored drives AME is generated while writing the
Synch
1 field to the disk AMF is expected while reading
Synch
1 from the disk
Header Synch
1 Pattern (HSP1) 24h
RW
76543210
Pattern
Pattern used for the Synch
1 field Can be used as an
Address Mark in soft sectored formats
Header Synch
2 Pattern (HSP2) 25h
RW
76543210
Pattern
Pattern used for the Synch
2 field
Header Byte 01 Control (HC01)
26h
RW
76543210
NC0
SM0
SN0
HB0
NC1
SM1
SN1
HB1
This register does not perform any pattern repetition nor
does it define a field size It is provided to control the func-
tion of each corresponding header byte There is one Head-
er Byte Control register for each pair of the six Header Byte
Pattern registers The upper four bits correspond to one pat-
tern register The lower four bits correspond to another pat-
tern register
NC Not Compared
1
This header byte will always match true for a Compare
Header operation
0
This header byte will be compared normally without
modification of the outcome
SM Header Failed Although Sector Matched Enable
1
The Header Failed Although Sector Matched function is
enabled for this header byte While searching for a
matching Header Segment if this field matches while
other header bytes don’t an error is reported in the
Disk Status register Typically this would be the sector
number field See Section 434 for additional informa-
tion
0
The Header Failed Although Sector Matched function is
not enabled for this header byte
SN Sector Number Substitution
1
The contents of the Sector Number register are substi-
tuted for this Header Byte pattern during a Write Head-
er operation and compared during a Compare Header
operation This is normally used in multi-sector com-
mands
0
The contents of the Header Byte Pattern register is writ-
ten to the disk for a Write Header operation and com-
pared during a Compare Header operation
30



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