DP8496 datasheet(15/92 Pages) NSC

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40 Functional Description (Continued)

424 Pointers

Three 22-bit pointers represent the three possible address-

es into the buffer memory These addresses are used by the

Disk Data Controller SCSI Bus Controller and the Proces-

sor Interface The Disk and SCSI pointers are double buff-

ered in what are called the Active and Holding register sets

Both of these Active pointers automatically increment on

every transfer to buffer memory The Processor pointer is

only single buffered It will increment automatically if en-

abled in the Setup 2 register

425 Buffer Management

The processor will normally initialize the Holding registers

with values before an operation is started When the opera-

tion begins the DP84967 will copy the contents of the

Holding registers into the Active registers (which are actual-

ly counters) This double buffering allows the processor to

load new values into the Holding registers while the previ-

ous operation is still continuing This feature allows for ver-

satile management of contiguous or non-contiguous buffers

TLF11212 – 5

FIGURE 41 Holding and Active Registers

The processor is allowed readwrite access to the Holding

registers It is only allowed to read the Active registers

Normally the processor will only access the Holding regis-

ters The Active registers are really the block counters and

address pointers actually used to transfer the data Thus

only in unusual situations will the Active registers need to be

read The AH (ActiveHolding) bit in the SCSI Operation

cess

The Processor Pointer does not have a Holding register

The Processor Pointer Active register will be accessed inde-

pendent of the AH bit

The Disk SCSI and Processor Pointer registers contents

have no relationship to one another thus one pointer is not

automatically kept a certain distance from the other

Instead the monitoring by the processor of block and sector

transfers is facilitated through the use of interrupts

Polling

could also be used by reading the SCSI Interrupt (49h) and

Disk Interrupt (12h) registers

Interrupts are programmable at three different levels (see

Figure 42 )

1 At the end of each block transferred

2 After a certain number of blocks have been transferred

This is called a ‘‘group’’

3 After all programmed blocks have been transferred or

‘‘command completion’’

(See the descriptions of DINTE (13h) and SINTE (4Ah) reg-

isters in Sections 43 and 44 respectively)

This provides a point of synchronization for the processor to

safely monitor the progress of both disk and SCSI transfers

and thus prevent overflow or underflow of the buffer memo-

ry Overflow and underflow are analogous to pointers over-

taking one another The processor is responsible for pre-

venting this

TLF11212 – 6

FIGURE 42 Flexible Interrupt Levels

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