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DP8496 Datasheet(PDF) 79 Page - National Semiconductor (TI) |
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DP8496 Datasheet(HTML) 79 Page - National Semiconductor (TI) |
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79 / 92 page ![]() 70 AC Specifications (Continued) 717 SCSI ARBITRATION TLF11212 – 51 ID Symbol Parameter Optimal BCLK Worst Case Units Min Max Min Max 171 bfbl Bus Free to BSY Out Asserted 12 15 12 22 m s 172 blsl BSY Out Asserted to SEL Out Asserted 24 40 24 50 m s 173 sea SEL Out Asserted to SCSI Data Change 12 14 12 21 m s 174 blidv BSY Out Asserted to Valid SCSI ID b 30 30 b 30 30 ns 175 bfidi Bus Free to Valid SCSI ID 12 15 12 22 m s Note BCLK is defined in the Setup 1 register Optimal BCLK is defined as follows Bclk Freq Code 7 6 Optimal Frequency 0 0 15 MHz 1 0 175 MHz 0 1 20 MHz 1 1 25 MHz ALL SCSI Signals are active-high on the DP8497 718 SCSI SELECTION AS INITIATOR (WO Arbitration) TLF11212 – 52 ID Symbol Parameter Optimal BCLK Worst Case Units Min Max Min Max 181 bsel BSY In Asserted to SEL Out Deasserted 90 90 ns 182 idsel Valid SCSI ID Out to SEL Out Asserted 90 230 90 350 ns 183 selid SEL Out Deasserted to SCSI ID Out Invalid b 30 30 b 30 30 ns 184 idatn Valid SCSI ID Out to ATN Out Asserted (if Enabled) b 30 30 b 30 30 ns 185 bidi BSY In Asserted to SCSI ID Out Invalid 90 90 ns Note ALL SCSI Signals are active-high on the DP8497 79 |
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