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DP8496 Datasheet(PDF) 85 Page - National Semiconductor (TI) |
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DP8496 Datasheet(HTML) 85 Page - National Semiconductor (TI) |
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85 / 92 page ![]() 70 AC Specifications (Continued) 727 SCSI ASYNCHRONOUS INFORMATION OUT PHASE AS INITIATOR TLF11212 – 61 ID Symbol Parameter Min Typ Max Units 271 iodz IO Valid to SCSI Data Valid 45 ns 272 pcreq Phase Change to REQ 50 ns 273 sds Data Setup to ACK (Note 4) ns 274 reqlackl REQ Low to ACK Low (Note 1) 90 235 ns 275 sdh Data Hold from REQ 0ns 276 reqhackh REQ High to ACK High (Note 3) 40 60 ns 277 phack Phase Hold from ACK High 0 ns Note 1 Transfer Period (in Synchronous Transfer register) e 0 If Transfer Period e 1 then add an additional bcp Note 2 bcp refers to the BCLK period in use This formula is tested only at the frequencies listed in Table 81 Note 3 This value is not valid for the very last transfer ACK will stay asserted Note 4 This value is programmable It is a functon of the BCLK Frequency bits in SUP1 register and the SCSI clock bits in SDIF2 register The SCSI 1 specification (including cable skew) is 55 ns The SCSI 2 specification (including cable skew) is 25 ns SCSI Clock Bits (10) 00 01 11 10 BCLK 00 10 10 20 15 Freq 01 15 10 20 15 (10) 10 15 10 20 15 11 15 10 20 15 Where 10 is defined as bcp b k k is a characterization constant Where 15 is defined as bcp a bc b k bc is either bcl or bch Where 20 is defined as 2 bcp b k k is a characterization constant All SCSI signals are active-high on the DP8497 85 |
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